US7227317B2ExpiredUtilityA1

Method and system for enhanced dimming resolution in a light ballast through use of multiple control frequencies

Assignee: ATMEL CORPPriority: Jun 10, 2004Filed: Jun 10, 2004Granted: Jun 5, 2007
Est. expiryJun 10, 2024(expired)· nominal 20-yr term from priority
Inventors:Ulf Samuelsson
H05B 41/3927H05B 41/3921H05B 41/3925Y10S315/04
38
PatentIndex Score
2
Cited by
22
References
24
Claims

Abstract

A microcontroller or state machine controls a light ballast utilizing a timer structure. The microcontroller can program the timer structure to generate pulses where the “average” frequency of a series of pulses can be varied with higher resolution than the frequency of a single pulse. This variation can occur without further microcontroller/state machine intervention. The pulses are used to control the on and/or off time of the light. The timer can be configured to modulate the outputs fast enough to ensure that the light does not appear to flicker to the human eye by limiting the number of pulses in a frame and by increasing the number of times the frequency shift occurs compared to the obvious implementation. The present invention relies on the fact that the human eye is not capable of detecting small frequency changes in high frequency signals and therefore uses pulses of two or more frequencies where the frequencies are close together. The average frequency can then be varied at much higher resolution than any single frequency.

Claims

exact text as granted — not AI-modified
1. A timer structure comprising:
 at least one reload register, the at least one reload register including different values; and 
 a counter mechanism coupled to the at least one reload register, wherein the counter mechanism generates pulses based upon the values in the at least one reload register in a manner that a high resolution dimming output is provided without processor or state machine intervention, wherein the counter mechanism comprises: 
 a first counter for receiving the values from the at least one reload register; 
 a second counter, the contents of the second counter being incremented after the first counter has reached a first predetermined value; and 
 a comparator mechanism for causing a predetermined number of pulses to be extended based upon a comparison of the contents of the second counter with a second predetermined value. 
 
     
     
       2. The timer structure of  claim 1  wherein the first predetermined value is zero. 
     
     
       3. The timer structure of  claim 1  wherein the at least one reload register contains a pulse length value. 
     
     
       4. The timer structure of  claim 1  wherein the comparator mechanism comprises:
 a register containing a second predetermined value; and 
 a comparator for comparing the second predetermined value to the contents of the second counter to determine the ratio of pulses that are to be extended. 
 
     
     
       5. The timer structure of  claim 4  wherein a pulse can be extended by changing a value within the register, typically the lower bit, either at the beginning or the end of a pulse. 
     
     
       6. The timer structure of  claim 1  wherein a pulse can be extended by stopping the timer structure temporarily. 
     
     
       7. A light ballast system comprising:
 a dimmable light ballast; 
 a microcontroller for controlling the dimmable light ballast, the microcontroller including a timer structure; the timer structure further comprising at least one of reload register, the at least one reload register including different values; and a counter mechanism coupled to the at least one reload register, wherein the counter mechanism generates pulses based upon the values in the at least one reload register in a manner that a high resolution dimming output is provided without processor or state machine intervention to change reload/compare values, wherein the counter mechanism further comprises: 
 a first counter for receiving the values from at least one reload register; 
 a second counter, the contents of the second counter being incremented after the first counter has reached a first predetermined value; and 
 a comparator mechanism for causing a predetermined number of pulses to be extended based upon a comparison of the contents of the second counter with a second predetermined value. 
 
     
     
       8. The system of  claim 7  wherein the first predetermined value is zero. 
     
     
       9. The system of  claim 7  wherein the at least one reload register contains a pulse length value used to determine the frequency together with the counter and the comparator mechanism. 
     
     
       10. The system of  claim 7  wherein the comparator mechanism comprises:
 a register containing a second predetermined value; and 
 a comparator for comparing the second predetermined value to the contents of the second counter to determine the ratio of pulses that are to be extended. 
 
     
     
       11. The system of  claim 10  wherein a pulse can be extended by changing a value within the register. 
     
     
       12. The system of  claim 7  wherein a pulse can be extended by stopping the timer structure temporarily. 
     
     
       13. A microcontroller comprising:
 a controller; and 
 a timer structure coupled to the controller; the timer structure further comprising at least one reload register, the at least one reload register including different values; and a counter mechanism coupled to the at least one reload register, wherein the counter mechanism generates pulses based upon the values in the at least one reload register in a manner that a high resolution dimming output is provided without processor or state machine intervention to change reload/compare values, wherein the counter mechanism further comprises: 
 a first counter for receiving the values from the at least one reload register: 
 a second counter, the contents of the second counter being incremented after the first counter has reached a first predetermined value; and 
 a comparator mechanism for causing a predetermined number of pulses to be extended based upon a comparison of the contents of the second counter with a second predetermined value after the one cycle. 
 
     
     
       14. The microcontroller of  claim 13  wherein the first predetermined value is zero. 
     
     
       15. The microcontroller of  claim 13  wherein the at least one reload register contains a pulse length value used to determine the frequency. 
     
     
       16. The microcontroller of  claim 13  wherein the comparator mechanism comprises:
 a register containing a second predetermined value; and 
 a comparator for comparing the second predetermined value to the contents of the second counter to determine the ratio of pulses that are to be extended. 
 
     
     
       17. The microcontroller of  claim 16  wherein a pulse can be extended by changing a value within the compare register. 
     
     
       18. The microcontroller of  claim 13  wherein a pulse can be extended by stopping the counter temporarily. 
     
     
       19. A timer structure comprising:
 at least one reload register, the at least one reload register including different values; and 
 a counter mechanism coupled to the at least one reload register, wherein the counter mechanism generates pulses based upon the values in the at least one reload register in a manner that an output is provided without processor or state machine intervention, wherein the counter mechanism comprises: 
 a first counter for receiving the values from the at least one reload register; 
 a second counter, the contents of the second counter being incremented after the first counter has reached a first predetermined value; and 
 a comparator mechanism for causing a predetermined number of pulses to be extended based upon a comparison of the contents of the second counter with a second predetermined value. 
 
     
     
       20. The timer structure of  claim 19  wherein the comparator mechanism comprises:
 a first register containing a first predetermined value; 
 a first comparator for comparing the first predetermined value, the value from the first counter and for providing the output when the value in the first register is greater than the value from the first counter; 
 a second register containing a second predetermined value; and 
 a second comparator for comparing the second predetermined value to the contents of the second counter to determine the ratio of pulses that are to be extended when the value in the first register is equal to the value from the first comparator. 
 
     
     
       21. A light ballast system comprising:
 a dimmable light ballast; 
 a microcontroller for controlling the dimmable light ballast, the microcontroller including a timer structure; the timer structure further comprising at least one of reload register, the at least one reload register including different values, wherein the at least one plurality of reload registers comprise two reload registers, wherein the values of the two reload registers are sufficiently close to allow for the extending of a pulse by one clock cycle; and a counter mechanism coupled to the two reload registers, wherein the counter mechanism comprises a first counter for receiving the values from any of the two reload registers; a second counter, the contents of the second counter being incremented after the first counter has reached a first predetermined value; and a comparator mechanism for causing a predetermined number of pulses to be extended based upon a comparison of the contents of the second counter with a second predetermined value, wherein the counter mechanism generates pulses based upon the value in the at least one reload register in a manner that a high resolution dimming output is provided without processor or state machine intervention to change reload/compare values. 
 
     
     
       22. The system of  claim 21  wherein the comparator mechanism comprises:
 a first register containing a first predetermined value; 
 a first comparator for comparing the first predetermined value with the value from the first counter and for providing an output when the value in the first register is greater than the value from the first counter; 
 a second register containing a second predetermined value; and 
 a second comparator for comparing the second predetermined value to the contents of the second counter to determine the ratio of pulses that are to be extended when the value in the first register is equal to the value from the first comparator. 
 
     
     
       23. A light ballast system comprising:
 a dimmable light ballast; 
 a microcontroller for controlling the dimmable light ballast, the microcontroller including a timer structure; the timer structure further comprising at least one of reload register, the at least one reload register including different values; and a counter mechanism coupled to the at least one reload register, wherein the counter mechanism generates pulses based upon the values in the at least one reload register in a manner that an output is provided without processor or state machine intervention to change reload/compare values, wherein the counter mechanism further comprises: 
 a first counter for receiving the values from at least one reload register; 
 a second counter, the contents of the second counter being incremented after the first counter has reached a first predetermined value; and 
 
       a comparator mechanism for causing a predetermined number of pulses to be extended based upon a comparison of the contents of the second counter with a second predetermined value. 
     
     
       24. The microcontroller of  claim 23  wherein the comparator mechanism comprises:
 a first register containing a first predetermined value; 
 a first comparator for comparing the first predetermined value the value from the first counter and for providing an output when the value in the first register is greater than the value from the first counter; 
 a second register containing a second predetermined value; and 
 a second comparator for comparing the second predetermined value to the contents of the second counter to determine the ratio of pulses that are to be extended when the value in the first register is equal to the value from the first comparator.

Join the waitlist — get patent alerts

Track US7227317B2 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.