Display apparatus for sequential pixel sampling including attenuated capacitive coupling between signal lines

Abstract

The present invention provides a display apparatus including a pixel array unit, a vertical driving circuit, and a horizontal driving circuit. The horizontal driving circuit includes a shift register for performing shift operation in synchronism with the clock signal and sequentially outputting shift pulses from respective shift stages, a shaping switch group for shaping the shift pulses sequentially outputted from the shift register and sequentially outputting non-overlap sampling pulses temporally separated from each other, and a sampling switch group for sequentially sampling the input video signal in a non-overlapping manner in response to the sampling pulses and supplying the sampled video signal to each of the signal lines. A capacitance interposed between adjacent signal lines is connected to wiring of lower impedance than a signal line side, thereby attenuating capacitive coupling between the adjacent signal lines and thus suppressing the potential variation of the video signal sampled in a non-overlapping manner and supplied to the signal lines.

1. A display apparatus comprising:
 a pixel array unit having gate lines in a form of rows, signal lines in a form of columns, and pixels arranged in a form of a matrix at intersections of the gate lines and the signal lines; 
 a vertical driving circuit connected to the gate lines, for sequentially selecting rows of the pixels; and 
 a horizontal driving circuit connected to the signal lines, for operating on the basis of a predetermined clock signal and sequentially writing a video signal to pixels of a selected row; 
 wherein said horizontal driving circuit includes: 
 a shift register for performing shift operation in synchronism with said clock signal and sequentially outputting shift pulses from respective shift stages; 
 a shaping switch group for shaping said shift pulses sequentially outputted from said shift register and sequentially outputting non-overlap sampling pulses temporally separated from each other; and 
 a sampling switch group for sequentially sampling the input video signal in a non-overlapping manner in response to said sampling pulses and supplying the sampled video signal to each of the signal lines; and 
 a capacitance interposed between adjacent signal lines is connected to wiring of lower impedance than a signal line side, thereby attenuating capacitive coupling between the adjacent signal lines and thus suppressing the potential variation of the video signal sampled in a non-overlapping manner and supplied to the signal lines; and 
 wherein the capacitance interposed between the signal lines is formed by a conductor film disposed over the adjacent signal lines via an insulating film, and the conductor film is connected to the wiring of lower impedance than the signal line side, thereby attenuating the capacitive coupling between the adjacent signal lines; and 
 wherein said pixel includes a pixel electrode connected to a signal line via a switching element and a counter electrode opposed to the pixel electrode with electro-optical material between the counter electrode and the pixel electrode; and 
 said conductor film is connected to a wiring for supplying a predetermined potential to the film. 
 
   
   
     2. A display apparatus comprising:
 a pixel array unit having gate lines in a form of rows, signal lines in a form of columns, and pixels arranged in a form of a matrix at intersections of the gate lines and the signal lines; 
 a vertical driving circuit connected to the gate lines, for sequentially selecting rows of the pixels; and 
 a horizontal driving circuit connected to the signal lines, for operating on the basis of a predetermined clock signal and sequentially writing a video signal to pixels of a selected row; 
 wherein said horizontal driving circuit includes: 
 a shift register for performing shift operation in synchronism with said clock signal and sequentially outputting shift pulses from respective shift stages; 
 a shaping switch group for shaping said shift pulses sequentially outputted from said shift register and sequentially outputting non-overlap sampling pulses temporally separated from each other; and 
 a sampling switch group for sequentially sampling the input video signal in a non-overlapping manner in response to said sampling pulses and supplying the sampled video signal to each of the signal lines; and 
 a capacitance interposed between adjacent signal lines; and 
 wherein the capacitance interposed between the signal lines is affected by a conductor film disposed over the adjacent signal lines via an insulating film, and the conductor film is connected to the wiring of lower impedance than the signal lines, thereby attenuating the capacitive coupling between the adjacent signal lines and thus suppressing the potential variation of the video signal sampled in a non-overlapping manner and supplied to the signal lines. 
 
   
   
     3. A display apparatus as claimed in  claim 2 ,
 wherein, 
 said conductor film is connected to a wiring for supplying a predetermined potential to the film. 
 
   
   
     4. A display apparatus as claimed in  claim 2 ,
 wherein said conductor film is formed by polysilicon for blocking light between the adjacent signal lines. 
 
   
   
     5. A display apparatus comprising:
 a pixel array unit having gate lines in a form of rows, signal lines in a form of columns, and pixels arranged in a form of a matrix at intersections of the gate lines and the signal lines; 
 a vertical driving circuit connected to the gate lines, for sequentially selecting rows of the pixels; and 
 a horizontal driving circuit connected to the signal lines, for operating on the basis of a predetermined clock signal and sequentially writing a video signal to pixels of a selected row; 
 wherein said display apparatus further comprises: 
 a conductor film disposed over adjacent signal lines via an insulating film so as to at least partially overlap two adjacent signal lines, and the conductor film connected to a wiring of lower impedance than the signal lines, thereby attenuating the capacitive coupling between the adjacent signal lines and thus suppressing the potential variation of the video signal sampled in a non-overlapping manner and supplied to the signal lines. 
 
   
   
     6. A display apparatus according to  claim 5 , wherein:
 said conductor film is connected to a wiring for supplying a predetermined potential to the film. 
 
   
   
     7. A display apparatus as claimed in  claim 6 ,
 wherein said conductor film is formed by polysilicon for blocking light between the adjacent signal lines.