Intercalling between native and non-native instruction sets

Abstract

A data processing system 118 is provided that supports execution of both native instructions using a processor core and non-native instructions that are interpreted using either a hardware translator 122 or a software interpreter. Separate explicit return to non-native instructions and return to native instructions are provided for terminating subroutines whereby intercalling between native and non-native code may be achieved with reduced processing overhead. Veneer non-native subroutines may be used between native code and non-native main subroutines. The veneer non-native subroutines may be dynamically created within the stack memory region of the native mode system.

1. Apparatus for processing data, said apparatus comprising:
 (i) a processor core operable to execute native instructions of a native instruction set; and 
 (ii) an instruction translator operable to interpret non-native instructions of a non-native instruction set into native instructions for execution by said processor core; wherein 
 (iii) said instruction translator is responsive to a return to non-native instruction of said non-native instruction set to return processing to a non-native instruction; and 
 (iv) said instruction translator is responsive to a return to native instruction of said non-native instruction set to return processing to a native instruction. 
 
   
   
     2. Apparatus as claimed in  claim 1 , wherein said instruction translator is a hardware based instruction translator. 
   
   
     3. Apparatus as claimed in  claim 1 , wherein said instruction translator is a software based interpreter. 
   
   
     4. Apparatus as claimed in  claim 1 , wherein said instruction translator is a combination of a hardware based instruction translator and a software based interpreter. 
   
   
     5. Apparatus as claimed in  claim 1 , wherein said non-native instructions are Java Virtual Machine instructions. 
   
   
     6. Apparatus as claimed in  claim 1 , wherein a non-native subroutine is called from native code via a non-native veneer subroutine, such that, upon completion of said non-native subroutine, a return to non-native instruction can be used to return processing to said non-native veneer subroutine with a return to native instruction within said non-native veneer subroutine serving to return processing to said native code. 
   
   
     7. Apparatus as claimed in  claim 6 , wherein said non-native subroutine is also called from non-native code. 
   
   
     8. Apparatus as claimed in  claim 6 , wherein said non-native veneer subroutine is dynamically created when said non-native subroutine is called from native code. 
   
   
     9. Apparatus as claimed in  claim 8 , wherein said non-native veneer subroutine is created stored within a stack memory area used by native code operation. 
   
   
     10. Apparatus as claimed in  claim 1 , wherein said instruction translator is responsive to a plurality of types of return to non-native instruction. 
   
   
     11. Apparatus as claimed in  claim 10 , wherein said plurality of types of return to non-native instruction are operable to return with respective different types of return value. 
   
   
     12. Apparatus as claimed in  claim 11 , wherein said plurality of different types of return value include one or more of:
 (i) a 32-bit integer return value; 
 (ii) a 64-bit integer return value; 
 (iii) an object reference return value; 
 (iv) a single precision floating point return value; 
 (v) a double precision floating point return value; and 
 (vi) a void return value having no value. 
 
   
   
     13. Apparatus as claimed in  claim 1 , wherein said instruction translator is responsive to a plurality of types of return to native instruction. 
   
   
     14. Apparatus as claimed in  claim 13 , wherein said plurality of types of return to native instruction are operable to return with respective different types of return value. 
   
   
     15. A method of processing data, said method comprising the steps of:
 (i) executing native instructions of a native instruction set using a processor core; and 
 (ii) interpreting non-native instructions of a non-native instruction set into native instructions for execution by said processor core; wherein 
 (iii) in response to a return to non-native instruction of said non-native instruction set, returning processing to a non-native instruction; and 
 (iv) in response to a return to native instruction of said non-native instruction set, returning processing to a native instruction. 
 
   
   
     16. A computer program product carrying a computer program for controlling a data processing apparatus in accordance with the method of  claim 15 . 
   
   
     17. Apparatus for processing data, comprising:
 processing means for executing native instructions of a native instruction set; and 
 translator means for interpreting non-native instructions of a non-native instruction set into native instructions for execution by said processing means being responsive to a return to non-native instruction of said non-native instruction set to return processing to a non-native instruction, and responsive to a return to native instruction of said non-native instruction set to return processing to a native instruction. 
 
   
   
     18. Apparatus as claimed in  claim 17 , further comprising:
 means for calling a non-native subroutine from native code via a non-native veneer subroutine, such that, upon completion of said non-native subroutine, a return to non-native instruction can be used to return processing to said non-native veneer subroutine with a return to native instruction within said non-native veneer subroutine serving to return processing to said native code. 
 
   
   
     19. Apparatus as claimed in  claim 18 , further comprising:
 means for calling said non-native subroutine from non-native code. 
 
   
   
     20. Apparatus as claimed in  claim 18 , further comprising:
 means for dynamically creating said non-native veneer subroutine when said non-native subroutine is called from native code. 
 
   
   
     21. Apparatus as claimed in  claim 20 , further comprising:
 means for storing said created non-native veneer subroutine within a stack memory area used by native code operation. 
 
   
   
     22. Apparatus as claimed in  claim 17 , wherein said translator means is responsive to a plurality of types of return to non-native instruction. 
   
   
     23. Apparatus as claimed in  claim 22 , wherein said plurality of types of return to non-native instruction are operable to return with respective different types of return value. 
   
   
     24. Apparatus as claimed in  claim 17 , wherein said instruction translator is responsive to a plurality of types of return to native instruction. 
   
   
     25. Apparatus as claimed in  claim 24 , wherein said plurality of types of return to native instruction are operable to return with respective different types of return value.