US6720788B2ExpiredUtilityA1
High resolution current measurement method
Est. expiryAug 5, 2022(expired)· nominal 20-yr term from priority
G01R 31/31704G01R 31/3008
39
PatentIndex Score
1
Cited by
4
References
14
Claims
Abstract
The present invention provides a system and method for high resolution current measurements of an integrated circuit ( 13 ). With the present invention, no DFT circuits are required. Leakage current characterizing an integrated circuit is determined for at least one logic state of the integrated circuit from a sum of a first and second current measurement. A voltage source ( 15 ) and a current source ( 17 ) are used at different settings for each measurement and the measurements are summed for evaluation with an expected value.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A method for determining leakage current characterizing an integrated circuit; said method comprising:
preconditioning the integrated circuit to a first logic state;
applying a voltage to the integrated circuit via a constant voltage source having current measurement capabilities, wherein said voltage is within the operating voltage range of the integrated circuit;
clamping a current from said constant voltage source to a value greater than the expected leakage current of the integrated circuit;
applying a current clamp of approximately zero amperes to the integrated circuit via a constant current source, wherein a voltage of said constant current source is set to an amount greater than said constant voltage source voltage;
determining a first current measurement via said constant voltage source;
subsequently adjusting said constant current source current clamp to said first current measurement and said constant voltage source current clamp to an amount at least two orders of magnitude lower than the expected leakage current of the integrated circuit;
determining a second current measurement via constant voltage source; and
summing said first current measurement and said second current measurement.
2. The method of claim 1 further including repeating said steps for a second logic state.
3. The method of claim 1 , wherein said constant current source voltage is selected to approximately 100 mV greater than said constant voltage source voltage.
4. The method of claim 1 , wherein said subsequent adjusted constant voltage source current clamp is selected to approximately 50 uA.
5. A system for determining leakage current characterizing an integrated circuit, comprising:
a constant voltage source coupled to the integrated circuit and adapted to supply a selectable current to the integrated circuit and adapted to supply the integrated circuit operating voltage;
a constant current source coupled to the integrated circuit and adapted to supply a selectable current to the integrated circuit and a voltage approximately that of the operating voltage of the integrated circuit;
a measurement unit coupled to the integrated circuit and adapted to sense the current conducted by the integrated circuit in a first and second measurement, wherein in the first measurement said constant voltage source current is selected to a value greater than the expected leakage current of the integrated circuit and said constant current source current is selected to a value of approximately zero amperes, and wherein in the second measurement said constant voltage source current is selected to a value at least two orders of magnitude less than the expected leakage current of the integrated circuit and said constant current source current is selected to the value of the first measurement, the sum of the first and second measurements is the leakage current characterizing an integrated circuit.
6. The system of claim 5 , wherein said measurement unit is farther adapted to sum said first and said second measurement results.
7. The system of claim 5 further including a logic unit coupled to the integrated circuit and adapted to precondition the integrated circuit to a plurality of logic states, wherein said first and second measurements are made at each of said logic states.
8. The system of claim 5 , wherein said measurement unit further includes analog to digital circuitry adapted to convert the sensed current from an analog value to a digital value.
9. A method for defect detection in an integrated circuit, comprising:
applying a voltage to the integrated circuit via a constant voltage source, wherein said voltage is within the operating voltage range of the integrated circuit;
clamping a current from said constant voltage source to a value approximately equal to a predetermined leakage current of the integrated circuit;
applying a current clamp of approximately zero amperes to the integrated circuit via a constant current source, wherein a voltage of said constant current source is set to an amount greater than said constant voltage source voltage;
determining a first current measurement via said constant voltage source;
subsequently adjusting said constant current source current clamp to said first current measurement and said constant voltage source current clamp to an amount at least two orders of magnitude lower than the threshold leakage current of the integrated circuit;
determining a second current measurement via constant voltage source; and
evaluating a sum of said first current measurement and said second current measurement to the threshold.
10. The method of claim 9 further including preconditioning the integrated circuit to a plurality of logic states, wherein said first and second current measurements are made for each logic state.
11. The method of claim 9 , wherein said constant current source voltage is selected to approximately 100 mV greater than said constant voltage source voltage.
12. The method of claim 9 , wherein a sum of said first and second current measurements greater than the threshold determines a defect.
13. The method of claim 9 , wherein said first and second current measurements are sensed as analog values and are converted to digital values.
14. The method of claim 9 , wherein said subsequently adjusted constant voltage source current clamp is selected to approximately 50 uA.Join the waitlist — get patent alerts
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