US6558979B2ExpiredUtilityA1
Use of palladium in IC manufacturing with conductive polymer bump
Est. expiryMay 21, 2016(expired)· nominal 20-yr term from priority
H05K 3/244H05K 2201/10977H05K 2201/10984H05K 2201/10674H05K 3/321H10W 72/856H10W 72/9415H10W 72/923H10W 72/07331H10W 72/07236H10W 72/073H10W 72/354H10W 72/351H10W 72/325H10W 72/352H10W 90/724H10W 72/07251H10W 72/253H10W 72/251H10W 72/252H10W 72/012H10W 72/20H10W 72/01223H10W 72/019H10W 90/701H10W 70/69H10W 74/15H10P 14/46H10W 74/012H10W 70/093
73
PatentIndex Score
10
Cited by
17
References
22
Claims
Abstract
An apparatus and a method for forming a substrate having a palladium metal layer over at least one contact point of the substrate and having a flexible conductive polymer bump, preferably a two-stage epoxy, on the palladium plated contact point. The present invention also relates to assemblies comprising one or more of these substrates.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A method of forming a conductive bump on a substrate, comprising:
providing a substrate having at least one electrical contact point;
applying at least one layer of palladium on said at least one electrical contact point of said substrate; and
disposing a two-stage, conductive polymer bump on said at least one palladium layer.
2. The method of claim 1 , further comprising:
applying a passivation layer over a surface of said substrate having said at least one electrical contact point.
3. The method of claim 2 , further comprising:
etching said passivation layer to expose said at least one electrical contact point.
4. The method of claim 1 , wherein said disposing a two-stage conductive polymer bump comprises disposing a two-stage epoxy bump on said at least one palladium layer.
5. The method of claim 1 , wherein said applying said at least one layer of palladium on said at least one electrical contact point of said substrate comprises: immersing said substrate in electroless plating solution containing palladium dispersed therein.
6. The method of claim 1 , wherein said disposing a two-stage conductive polymer bump on said at least one palladium layer comprises applying a layer of a polymer with a silk screen to form said two-stage conductive polymer bump.
7. The method of claim 1 , wherein said disposing a two-stage conductive polymer bump on said at least one palladium layer comprises applying multiple layers of a polymer with a silk screen to form said two-stage conductive polymer bump.
8. The method of claim 1 , wherein said providing said substrate having at least one electrical contact point comprises providing a silicon wafer having at least one electrical contact point.
9. The method of claim 1 , wherein said providing said substrate having at least one electrical contact point comprises providing a printed circuit board having at least one electrical contact point.
10. The method of claim 1 , wherein said providing said substrate having at least one electrical contact point comprises providing a semiconductor die having at least one bond pad.
11. The method of claim 1 , wherein said disposing a two-stage conductive polymer bump comprises disposing a two-stage conductive polymer bump on said at least one palladium layer, which said two-stage conductive polymer bump includes palladium therein.
12. A method for forming a semiconductor assembly having a plurality of substrates, each substrate having at least one electrical contact point, comprising:
applying a layer of palladium on said at least one electrical contact point of one substrate of said plurality of substrates; and
disposing a two-stage conductive polymer bump between at least one of said at least one electrical contact point having said palladium layer thereon of said substrate of said plurality of substrates and said at least one electrical contact point of another substrate of said plurality of substrates, forming an electrical contact therebetween.
13. The method of claim 12 , wherein said disposing a two-stage conductive polymer bump comprises disposing a two-stage conductive polymer bump on said palladium layer, which said two-stage conductive bump includes palladium therein.
14. The method of claim 12 , further comprising:
applying a passivation layer over a surface of said plurality of substrates having said at least one electrical contact point.
15. The method of claim 14 , further comprising:
etching said passivation layer to expose said at least one electrical contact point.
16. The method of claim 12 , wherein said disposing a two-stage conductive polymer bump comprises disposing a two-stage epoxy bump on said palladium layer.
17. The method of claim 12 , wherein said applying said layer of palladium on said at least one electrical contact point of said one substrate comprises:
immersing said one substrate of said plurality of substrates in electroless plating solution containing palladium dispersed therein.
18. The method of claim 12 , wherein said disposing a two-stage conductive polymer bump comprises applying a layer of a polymer with a silk screen to form said two-stage conductive polymer bump.
19. The method of claim 12 , wherein said disposing a two-stage conductive polymer bump comprises applying multiple layers of a polymer with a silk screen to form said two-stage conductive polymer bump.
20. The method of claim 12 , wherein said palladium layered electrical contact point-containing substrate of said plurality of substrates comprises a silicon wafer.
21. The method of claim 12 , wherein said palladium layered electrical contact point-containing substrate of said plurality of substrates comprises a printed circuit board.
22. The method of claim 12 , wherein said palladium layered electrical contact point-containing substrate of said plurality of substrates comprises a semiconductor die wherein said at least one electrical contact point comprises at least one bond pad.Join the waitlist — get patent alerts
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