Process for producing semiconductor package and structure thereof

Abstract

A process for producing a semiconductor package and a structure thereof are provided in that yield per unit wafer is increased, yield and reliability are improved, and the number of production steps are decreased. The process includes the steps of a step of forming a bump on a semiconductor wafer for respective semiconductor chip constituting a semiconductor package; a step of dicing a substrate, which has been prepared, into a substrate piece corresponding to the respective semiconductor chip; a step of die-boding the substrate piece, which has been diced, on the semiconductor wafer with making the bump to correspond to the respective semiconductor chip; a step of sealing a gap between the semiconductor wafer and the substrate piece, which have been die-bonded, with a resin; and a step of dicing the semiconductor wafer and the substrate piece, which have been sealed with the resin, into the respective semiconductor package.

What is claimed is:  
     
       1. A process for producing a semiconductor package comprising a semiconductor chip, a sealing resin and a substrate, which comprises the steps of: 
       a step of forming a bump on a semiconductor wafer for respective semiconductor chip constituting said semiconductor package;  
       a step of dicing a substrate, which has been prepared, into a substrate piece corresponding to said respective semiconductor chip;  
       a step of die-bonding said substrate piece, which has been diced, on said semiconductor wafer with making said bump to correspond to said respective semiconductor chip;  
       a step of sealing a gap between said semiconductor wafer and said substrate piece, which have been die-bonded, with a resin; and  
       a step of dicing said semiconductor wafer and said substrate piece, which have been sealed with said resin, into said respective semiconductor package.  
     
     
       2. A process for producing the semiconductor package as claimed in  claim 1 , wherein said step of forming said bump on said semiconductor wafer and said step of dicing said substrate into a substrate piece are simultaneously conducted in parallel. 
     
     
       3. A process for producing the semiconductor package as claimed in  claim 1 , wherein said substrate piece is diced into a size smaller than a size of said semiconductor chip. 
     
     
       4. The method of  claim 1 , further comprising: 
       attaching an adhesive sheet to a first side of a substrate, wherein the plurality of substrate pieces are retained in place by the adhesive sheet during the cutting of the substrate.  
     
     
       5. The method of  claim 4 , wherein cutting the substrate into a plurality of substrate pieces includes using a blade having a first blade width, and 
       cutting the resin and the semiconductor wafer includes using a blade having a second blade width, wherein the second blade width is less than the first blade width.  
     
     
       6. The method of  claim 4 , wherein sealing a space between the semiconductor wafer and the plurality of substrate pieces with a resin includes moving at least one void to a position below a kerf gap. 
     
     
       7. The method of  claim 4 , further comprising: 
       expelling the at least one void from the space through a kerf gap.  
     
     
       8. The method of  claim 4 , wherein moving at least one void to a position below a kerf gap includes using a defoaming machine. 
     
     
       9. The method of  claim 4 , wherein the substrate includes a circuit pattern. 
     
     
       10. The method of  claim 9 , further comprising: 
       expelling at least one void from a space through a kerf gap.