Method for preventing damage of low-k dielectrics during patterning

Abstract

A process for manufacturing a semiconductor device includes forming a first metallization level, forming a first etch stop layer, forming a low-k dielectric layer, forming a cap layer, depositing a resist, forming an opening; removing the resist, curing the dielectric material, etching the first etch stop layer, and filing the opening with metal. The first etch stop layer is formed over the first metallization level, and the low-k dielectric layer material is formed over the first etch stop layer. The cap layer is formed over the low-k dielectric layer material, and the resist is formed over the dielectric layer. Etching is used to form the opening. The resist is removed with an O2 stripping process. Curing of the dielectric material forms a dielectric layer and occurs after the resist is removed.

What is claimed is:  
     
       1. A method of manufacturing a semiconductor device, comprising the steps of: 
       forming a first level;  
       forming dielectric material over the first level;  
       forming a resist over the dielectric material;  
       etching to form an opening through the dielectric material;  
       removing the resist;  
       curing the dielectric material after the resist is removed to form a dielectric layer; and  
       filling the opening with metal to form a feature.  
     
     
       2. The method of manufacturing a semiconductor device according to  claim 1 , wherein the dielectric layer has a dielectric constant less than about 3.5. 
     
     
       3. The method of manufacturing a semiconductor device according to  claim 2 , further comprising the step of forming a cap layer on the dielectric material. 
     
     
       4. The method of manufacturing a semiconductor device according to  claim 1 , wherein the resist is removed using an O 2  stripping process. 
     
     
       5. The method of manufacturing a semiconductor device according to  claim 1 , further comprising the step of forming a first etch stop layer on the first level. 
     
     
       6. The method of manufacturing a semiconductor device according to  claim 5 , wherein the first level is a first metallization level. 
     
     
       7. The method of manufacturing a semiconductor device according to  claim 6 , wherein the metal and the first metallization level comprise copper (Cu) or a Cu alloy. 
     
     
       8. The method of manufacturing a semiconductor device according to  claim 7 , further comprising forming a diffusion barrier layer on the sidewalls of the opening and on the first metallization level. 
     
     
       9. The method of manufacturing a semiconductor device according to  claim 1 , wherein the opening is a via opening or a trench; and wherein the feature comprises a via, a line, or a combination of a lower via in contact with an upper line, respectively. 
     
     
       10. The method of manufacturing a semiconductor device according to  claim 1 , wherein the step of forming the dielectric material includes baking the dielectric material. 
     
     
       11. The method of manufacturing a semiconductor device according to  claim 10 , wherein the baking is at a temperature of about 350° C. for about 60 to about 180 seconds. 
     
     
       12. The method of manufacturing a semiconductor device according to  claim 1 , wherein the curing is at a temperature of about 400° C. to about 450° C. for about one hour. 
     
     
       13. A method of manufacturing a semiconductor device, comprising the steps of: 
       forming a first metallization level including a first feature;  
       forming a first etch stop layer over the first metallization level;  
       forming a low-k dielectric layer material over the first etch stop layer;  
       forming a cap layer over the low-k dielectric layer material;  
       forming a resist over the cap layer;  
       etching to form an opening through the cap layer and the dielectric layer;  
       removing the resist with an O 2  stripping process;  
       curing the dielectric material after the stripping process to form a dielectric layer;  
       etching through the first etch stop layer to expose the first feature; and  
       filling the opening with metal to form a second feature.