Method of forming salicide
Abstract
A method of forming salicide, of which the characteristics is the formation of a silicon nitride layer before the source/drain being implanted with dopant. The silicon nitride layer avoid the oxygen within the oxide layer to implant into the source/drain. Thus, a better salicide is obtained. In addition, the formation of the parasitic spacers made of silicon nitride at the side wall bottom of the gate spacer increases the distance between the salicide and the junction. Consequently, the leakage current is prevented. While the silicon nitride layer is removed, the polysilicon of gate and the silicon of the source/drain are amorphized. This is advantageous to the formation of salicide without the step of ion implantation.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A method of forming a self-aligned silicide (salicide), the method comprising: providing a substrate doped with a first conductivity type of dopant, on an active region of the substrate, providing at least a metal-oxide semiconductor device which comprises a gate, a spacer around a side wall of the gate, a lightly doped region in the substrate at each side of the gate; forming a conformal insulating layer over the substrate, wherein the insulating layer includes a material different from a material of the spacer in a property of etching rate; implanting a second conductivity type of dopant into the device to form a source/drain region with a lightly doped drain (LDD) structure by using the spacer and the gate as masks; removing the insulating layer by an etching back process, so that a parasitic spacer is formed at a bottom portion of the spacer of the gate, and top surfaces of the gate and the source/drain region are consequently amorphized by the etching back process; and forming a metal salicide layer on the top surfaces of the gate and the source/drain region.
2. The method according to claim 1, wherein the first conductivity type of dopant comprises a P-type dopant and the second conductivity type-of dopant comprises an N-type dopant.
3. The method according to claim 1, wherein the first conductivity type of dopant comprises an N-type dopant and the second conductivity type of dopant comprises a P-type dopant.
4. The method according to claim 1, wherein the active region is isolated by an isolation structure.
5. The method according to claim 1, wherein the active region is isolated by one selected from a group consisting of a shallow trench isolation (STI) structure and a field oxide (FOX) structure.
6. The method according to claim 1, wherein the metal salicide layer comprises a titanium salicide layer.
7. The method according to claim 1, wherein after the step of forming the salicide layer, the method further comprises: forming a dielectric layer over the substrate; and patterning the dielectric layer to form a plurality of contact openings to expose a portion of the source/drain region.
8. The method according to claim 1, wherein the insulating layer comprises silicon nitride if the spacer comprises silicon oxide, and the insulating layer comprises silicon oxide if the spacer comprises silicon nitride.
9. The method according to claim 1, wherein the step of forming the metal salicide layer further comprises: forming a metal layer over the substrate; and performing a rapid thermal process, so that the metal layer reacts with silicon material on the top surfaces of the gate and the source/drain region to form the salicide layer; removing an unreacted portion of the metal layer.
10. The method according to claim 1, wherein the step of forming the silicon nitride layer is performed before the step of implanting the second conductivity type of dopant.
11. The method according to claim 1, wherein the step of forming the silicon nitride layer is performed after the step of implanting the second conductivity type of dopant.Join the waitlist — get patent alerts
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