Binary counter system using bit-wise matches with maximum count

Abstract

A counting system with a dynamic maximum count includes a counter, match logic, and a maximum count controller. The counter has a present count register, a clock (or event indicator) event input, and a reset input. The maximum count controller can be programmed with an adjustable maximum count stored in a maximum count register. The match logic includes a count-wide AND gate fed by NAND gates. Each NAND gate has an inverted input coupled to a respective bit position of the present count register and an uninverted input coupled to a respective bit position of the maximum count register. The function of the match logic is to indicate a match whenever the present count has a 1 at every bit position that the maximum count has a 1, irrespective of the present count values at bit positions at which the maximum count has 0s. Thus, imperfect matches are provided for. The values of the imperfect matches always exceed the values of perfect matches, so they are not usually encountered. However, in the case the maximum count is adjusted from above to below the present count, the invention achieves the desired change in rate of match indications more quickly than would be achieved if perfect matches were required. In addition, the match logic for the imperfect matches is simpler than the logic required for perfect matches. Thus, the invention provides both better functionality and a simpler implementation of a counting system.

What is claimed is: 
     
       1. A counting system comprising: a binary counter for providing a present count;   a controller for providing a dynamic maximum count; and   match logic for indicating a match whenever said present count has a 1 at every bit position that said maximum count has a 1.   
     
     
       2. A counting system comprising: a counter for providing a present count; and   system-match logic for indicating a match when said present count matches a maximum count at every bit position and when said present count does not match said maximum count at every bit position but does match said maximum count at every bit position at which said maximum count has a 1, but not when said present count differs from maximum count at a bit position at which said maximum count has a 1.   
     
     
       3. A counting system as recited in claim 2 wherein said system match logic indicates a match whenever said present count matches said maximum count at every bit position that said maximum bit position has a 1. 
     
     
       4. A counting system as recited in claim 2 further comprising a memory for storing said maximum count. 
     
     
       5. A counting system as recited in claim 4 wherein said system match logic includes: bit-wise match logic for indicating a bit-wise match for each bit position of said present count and said maximum count whenever the value of said maximum count at said bit position is not greater than the value at the same bit position of said present count; and   count-wide match logic for indicating a count-wide match when said bit-wise logic indicates a bit-wise match at every one of said bit positions.   
     
     
       6. A counting system as recited in claim 5 further comprising a controller for adjusting said maximum count. 
     
     
       7. A binary counting method comprising the steps of: counting so as to provide an incrementing binary present count;   providing a system-match indication when said present count matches a maximum count and when said present count exceeds said maximum count at at least one bit position but said maximum count does not exceed said present count at any bit position.   
     
     
       8. A method as recited in claim 7 further comprising a step of storing said maximum count before said counting step. 
     
     
       9. A method as recited in claim 8 further comprising a step of adjusting said maximum count during said counting step. 
     
     
       10. A method as recited in claim 9 wherein said indicating step involves: providing bit-wise match indications for each bit position at which the value of said present count is greater than or equal to the value of said maximum count, but not when the value of said maximum count is greater than the value of said present count; and   providing said system match indication when a bit-wise match indication is provided for all bit positions of said present count.