Method of programming non-volatile memory devices having a NAND type cell array

Abstract

A method for programming non-volatile semiconductor memory devices having NAND cell arrays is provided. In a program operation, a pass voltage is applied to unselected word lines, and then a voltage lower than the pass voltage is applied to only the word line which is adjacent to a selected word line and is placed between the selected word line and a reference selection circuit. According to this programming method, the memory device can be programmed without restriction of programming sequence.

What is claimed is: 
     
       1. A method for programming an electrically erasable and programmable non-volatile semiconductor device having a string of a plurality of memory cell transistors and a plurality of word lines; each cell transistor including a source, a drain, a channel, a floating gate and a control gate; control gates of said cell transistors being connected to said word lines; source-drain channels of said cell transistors being connected in series between a string selection circuit for selecting said string and a reference selection circuit for providing a reference potential; said method comprising steps of: selecting said string by means of said string selection circuit;   selecting one of said word lines;   applying a pass voltage to unselected word lines;   applying a voltage lower than said pass voltage to the word line which is adjacent to said selected word line and is placed between said selected word line and said reference selection circuit; and   applying a program voltage to said selected word line.   
     
     
       2. The method of claim 1, wherein said voltage lower than said pass voltage equals ground potential.