Method of making a spacer based antifuse structure for low capacitance and high reliability

Abstract

The present antifuse includes a base having a first electrode thereon which defines a top surface and a side surface. Antifuse material is disposed on the first electrode on at least a portion of the top surface and at least a portion of the side surface, with a second electrode on the antifuse material. Due to this configuration, defect problems in etching oxide as part of the antifuse structure are avoided, and meanwhile capacitance of the device is very low.

I claim: 
     
       1. A method of fabricating an antifuse structure comprising: providing a base;   providing a first electrode on said base having a top surface and a side surface;   providing an antifuse comprising amorphous silicon on and in direct contact with at least a portion of the top surface and the side surface, so that the amorphous silicon lies along and in direct contact with the side surface; and   providing a second electrode on said amorphous silicon.   
     
     
       2. The method of claim 1 and further comprising the step of providing that a portion of the second electrode is disposed along but spaced from at least a portion of the side surface. 
     
     
       3. The method of claim 1 and further comprising the step of providing that a portion of the amorphous silicon is in contact with the base. 
     
     
       4. The method of claim 1 and further providing the step that a portion of the second electrode is disposed along but spaced from at least a portion of the top surface of the first electrode, so as to overlap to an extent said first electrode. 
     
     
       5. The method of claim 1 and further comprising the step of providing the first and second electrodes as metal.