Method and arrangement for resolution enhancement
Abstract
A method and arrangement for resolution enhancement of a coordinate input device. The method includes the steps of receiving a predetermined number of light beams, which are generated from a light source and passed through a rotating grating disc, by a light detector; detecting the intensity of the light beams by the light detector so as to receive a continuous response voltage signal; converting the continues response voltage signal to a digital signal; and distinguishing the digital signal as at least three different detecting modes by a plurality of predetermined critical values for enhancing the resolution of the coordinate input device. The arrangement includes a light detector having at least two light sensors for receiving at least two light beams generated from a light source and passed through a rotatable grating disc, wherein the light sensors detect the intensity of the light beams as at least three different detecting modes and generate a predetermined number of continuous response voltage signals. A pair of analog digital converters, which are connected with the two light sensors, are adapted to transform the continuous response voltage signals to a predetermined number of digital signals for distinguishing the varying between the three different detecting modes. A computing determination logic is connected with the pair of analog digital converted for distinguishing the different detecting modes of the digital signals according to a plurality of predetermined critical values for resolution enhancement.
Claims
exact text as granted — not AI-modifiedI claim:
1. A method for resolution enhancement of a coordinate input device, comprising the steps of (a) receiving a predetermined number of light beams generating from a light source and passing through a rotating grating disc by a light detector; (b) detecting the intensity of said light beams by said light detector so as to receive a continuous response voltage signal; (c) converting said continues response voltage signal to a digital signal; and (d) distinguishing said digital signal as at least three different detecting modes by means of a plurality of predetermined critical values for enhancing the resolution of said coordinate input device.
2. A method for resolution enhancement, as recited in claim 1, in which, in said step (a), said grating disc has a plurality of grating slots for said light beam to pass through and being received by said light detector, and that said detecting modes includes a "completely block" mode, a "half block" mode and a "completely not block" mode.
3. A method for resolution enhancement, as recited in claim 1, in which, in said step (a), said grating disc has a plurality of grating slots for said light beam to pass through and being received by said light detector, and that said detecting modes includes a "completely block" mode, a "1/3 block" mode, a "2/3 block" mode, and a "completely not block" mode.
4. A method for resolution enhancement, as recited in claim 1, in which said step (d) further comprises the following steps of delivering said detecting modes to a predetermined number of displacement direction determining circuitries and displacement computing pulse generating circuitries; generating a respective pulse regarding to a rotating direction and displacement of said grating disc; and receiving said respective pulse by a up-count and down-count calculator for collecting an information of said coordinate input device's movement and distributing said information for computer analysis.
5. An arrangement for resolution enhancement, comprising a light detector having at least two light sensors for receiving at least two light beams generated from a light source and passing through a rotatable grating disc, wherein the light sensors detect the intensity of said light beams as at least three different detecting modes of completely block, partially block and completely not block of said light beams by said grating disc, and generate a predetermined number of continuous response voltage signals; a pair of analog digital converters, which are connected with said two light sensors, transforming said continuous response voltage signals to a predetermined number of digital signals for distinguishing the varying between said three different detecting modes; and a computing determination logic which is connected with said pair of analog digital converted distinguishing said different detecting modes of said digital signals according to a plurality of predetermined critical values for resolution enhancement.
6. An arrangement for resolution enhancement, as recited in claim 5, in which said partially block mode is a half block mode.
7. An arrangement for resolution enhancement, as recited in claim 5, in which said partially block mode further comprises a 1/3 block mode and a 2/3 block mode.
8. An arrangement for resolution enhancement, as recited in claim 5, in which said light sensor is a photoelectric chips.
9. An arrangement for resolution enhancement, as recited in claim 5, in which said light sensor is a photo diode.
10. An arrangement for resolution enhancement, as recited in claim 5, in which said analog digital converter comprises an analog digital converting circuit constituting by a plurality of comparators.
11. An arrangement for resolution enhancement, as recited in claim 5, in which said analog digital converter comprises a circuit formed by a comparator which has an adjustable reference voltage.
12. An arrangement for resolution enhancement, as recited in claim 5, in which said analog digital converter comprises an analog digital converting circuit which is constituted by a plurality of logic gates having various input transform voltages.
13. An arrangement for resolution enhancement, as recited in claim 5, in which said analog digital converter comprises an analog digital converting circuit which utilizes a plurality of current output features of said light sensors by charging their ultimate capacitors and circuitry miscellaneous dissipating capacitors to calculate a charging inclination.
14. An arrangement for resolution enhancement, as recited in claim 5, in which, said analog digital converter is a hardware circuitry.
15. An arrangement for resolution enhancement, as recited in claim 5, in which said analog digital converter is a software circuitry.
16. An arrangement for resolution enhancement, as recited in claim 5, in which said analog digital converter is a firmware circuitry.
17. An arrangement for resolution enhancement, as recited in claim 5, in which said analog digital converter comprises a plurality of circuitries including a hardware circuitry, a software circuitry and a firmware circuitry.
18. An arrangement for resolution enhancement of a coordinate input device, comprising a light detector having at least two light sensors for receiving at least two light beams generated from a light source and passed through a rotatable grating disc, wherein the light sensors detect the intensity of said light beams as at least three different detecting modes of completely block, partially block and completely not block of said light beams by said grating disc, and generate a predetermined number of continuous response voltage signals; a pair of analog digital converters, which are connected with said two light sensors, transforming continues response voltage signals to a predetermined number of digital signals for distinguishing the varying between said three different detecting modes; a pair of displacement direction determining circuitries connected with said two analog digital converters respectively and a pair of displacement computing pulse generating circuitries connected with said two analog digital converters respectively, wherein said distinguished digital signals are delivered to said pair of displacement direction determining circuitries and said pair of displacement computing pulse generating circuitries respectively so as to generate a predetermined number of respective pulses regarding to a rotating direction and displacement of said grating disc; and an up-count and down-count calculator connected with said pair of displacement direction determining circuitries and said pair of displacement computing pulse generating circuitries respectively for collecting said pulse information of a movement of said coordinate input device and distributing such information for analysis.
19. An arrangement for resolution enhancement, as recited in claim 18, in which said partially block mode is a half block mode.
20. An arrangement for resolution enhancement, as recited in claim 18, in which said partially block mode further comprises a 1/3 block mode and a 2/3 block mode.
21. An arrangement for resolution enhancement, as recited in claim 18, in which said light sensor is a photoelectric chips.
22. An arrangement for resolution enhancement, as recited in claim 18, in which said light sensor is a photo diode.
23. An arrangement for resolution enhancement, as recited in claim 18, in which said analog digital converter comprises an analog digital converting circuit constituting by a plurality of comparators.
24. An arrangement for resolution enhancement, as recited in claim 18, in which said analog digital converter comprises a circuit formed by a comparator which has an adjustable reference voltage.
25. An arrangement for resolution enhancement, as recited in claim 18, in which said analog digital converter comprises an analog digital converting circuit which is constituted by a plurality of logic gates having various input transform voltages.
26. An arrangement for resolution enhancement, as recited in claim 18, in which said analog digital converter comprises an analog digital converting circuit which utilizes a plurality of current output features of said light sensors by charging their ultimate capacitors and circuitry miscellaneous dissipating capacitors to calculate a charging inclination.
27. An arrangement for resolution enhancement, as recited in claim 18, in which, said analog digital converter is a hardware circuitry.
28. An arrangement for resolution enhancement, as recited in claim 18, in which said analog digital converter is a software circuitry.
29. An arrangement for resolution enhancement, as recited in claim 18, in which said analog digital converter is a firmware circuitry.
30. An arrangement for resolution enhancement, as recited in claim 18, in which said analog digital converter comprises a plurality of circuitries including a hardware circuitry, a software circuitry and a firmware circuitry.
31. An arrangement for resolution enhancement of a coordinate input device, comprising a light detector having at least two light sensors for receiving at least two light beams generated from a light source and passed through a rotatable grating disc, wherein the light sensors detect the intensity of said light beams as at least three different detecting modes of completely block, partially block and completely not block of said light beams by said grating disc, and generate a predetermined number of continuous response voltage signals; two pair of input circuitries connected with said two light sensors respectively for receiving said continuous response voltage signals and distinguishing, by means of a plurality of predetermined critical values of said input circuitries, the varying between said three different detecting modes of completely not block, partially block and completely block of said light beams by said rotatable grating disc; a pair of displacement direction determining circuitries and a pair of displacement computing pulse circuitries, wherein one of said displacement direction determining circuitries is connected with one pair of said input circuitries and the other said displacement direction determining circuitry is connected with said another pair of input circuitries respectively, one of said displacement computing pulse generating circuitries being connected with one of said pair of input circuitries and the other said displacement computing pulse generating circuitry being connected with another said pair of input circuitries respectively, wherein a plurality of distinguished results are delivered from said input circuitries to said pair of displacement direction determining circuitries and said pair of displacement computing pulse generating circuitries respectively so as to generate a predetermined number of respective pulses regarding to a rotating direction and displacement of said grating disc; and an up-count and down-count calculator connected with said pair of displacement direction determining circuitries and said pair of displacement computing pulse generating circuitries respectively for collecting said pulse information of a movement of said coordinate input device and distributing said pulse information for analysis.
32. An arrangement for resolution enhancement, as recited in claim 31, in which said partially block mode is a half block mode.
33. An arrangement for resolution enhancement, as recited in claim 31, in which said partially block mode further comprises a 1/3 block mode and a 2/3 block mode.
34. An arrangement for resolution enhancement, as recited in claim 31, in which said light sensor is a photoelectric chips.
35. An arrangement for resolution enhancement, as recited in claim 31, in which said light sensor is a photo diode.Join the waitlist — get patent alerts
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