Device for suppressing voltage fluctuation and higher harmonics

Abstract

A device for suppressing voltage fluctuation and higher harmonics of a power source system which supplies power to a load with large power fluctuation and large harmonic current. The device includes a self-commutated converter arranged in parallel with the load and a control circuit for controlling the self-commutated converter. The control circuit includes a compensation current variable calculation circuit for calculating a plurality of compensation current variables based on electrical quantities of the power source system and the load, a compensation gain calculation circuit for determining at least one compensation gain based on at least one of the compensation current variable, and a current instruction value calculation circuit for calculating a plurality of respective current instruction values based on the compensation gain and a plurality of the respective current compensation variables. The control circuit also includes an overall current instruction value calculation circuit for calculating an overall current instruction value by combining the current instruction values, and a current control circuit for controlling an output current of the self-commutated converter based on the overall current instruction value.

What is claimed is: 
     
       1. A device for suppressing voltage fluctuation and higher harmonics of a power source system which supplies power to a load with large power fluctuation and large harmonic current, said device comprising: a self-commutated converter arranged in parallel with said load; and   a control circuit for controlling said self-commutated converter;   said control circuit comprising:   compensation current variable calculation means for calculating a plurality of compensation current variables based on electrical quantities of said power source system and said load;   compensation gain calculation means for determining at least one compensation gain based on said at least one compensation current variable;   current instruction value calculation means for calculating a plurality of respective current instruction values based on said compensation gain and a plurality of said respective current compensation variables;   overall current instruction value calculation means for calculating an overall current instruction value by combining said plurality of current instruction values;   current control means for controlling an output current of said self-commutated converter based on said overall current instruction value;   overall compensation gain calculation means for determining an overall compensation gain based on said overall current instruction value; and   final current instruction value calculation means for calculating a final current instruction value by multiplying said overall current instruction value and said overall compensation gain;   said overall compensation gain being determined such that said final current instruction value does not exceed a rated current value of said self-commutated converter;   whereby said current control means controls said output current of said self-commutated converter based on said final current instruction value in place of said overall current instruction value;   said compensation current variable calculation means calculating said plurality of compensation current variables including compensation current variables for reactive power component for negative phase sequence current component and for harmonic current component based on a current and a voltage of said power source system and a load current; and   said current instruction value calculation means calculating said plurality of respective current instruction values including current instruction values for reactive power component for negative phase sequence current component and for harmonic current component based on said compensation gain and said respective compensation current variables;   wherein in said compensation current variable calculation means, said compensation current variable for reactive power component includes a reactive power (QL) of said load, said compensation current variable for negative phase sequence current component includes an instantaneous real power (pN) and an instantaneous imaginary power (qN) of a fundamental wave negative phase sequence power, and said compensation current variable for harmonic current component includes a harmonic current (iH) of said power source system;   wherein, said compensation gain calculation means determines said compensation gain (KN) for said negative phase sequence current component based on said instantaneous real power (pN) and said instantaneous imaginary power (qN) of said fundamental wave negative phase sequence power; and   wherein said current instruction value calculation means calculates said current instruction value (iQo) for reactive power component based on a fixed compensation gain (KQ) for said reactive power component and said reactive power of said load (QL), calculates said current instruction value (iNo) for negative phase sequence current component based on said compensation gain (KN) for said negative phase sequence current component and said instantaneous real power (pN) and said instantaneous imaginary power (qN) of said fundamental wave negative phase sequence power, and calculates said current instruction value (iHo) for harmonic current component based on a fixed compensation gain (KH) for said harmonic current component and said harmonic current (iH);   wherein said compensation gain calculation means includes:   a first absolute value detection circuit for detecting an absolute value (PN) of said negative phase sequence power based on said instantaneous real power (pN) and said instantaneous imaginary power (qN) of said fundamental wave negative phase sequence power to generate as a first absolute value;   a first hold circuit for holding a maximum value (PNmax) of said first absolute value for a first fixed time to generate as a first maximum value; and   a first gain determining circuit for determining said compensation gain (KN) for said negative phase sequence current component based on said first maximum value.   
     
     
       2. The device for suppressing voltage fluctuation and higher harmonics according to claim 1, wherein: said first gain determining circuit determines said compensation gain (KN) for said negative phase sequence current component such that when said first maximum value is smaller than a first predetermined value said compensation gain (KN) is 1, and when said first maximum value is not smaller than said first predetermined value said compensation gain (KN) is inverse proportional to said first maximum value.   
     
     
       3. The device for suppressing voltage fluctuation and higher harmonics according to claim 2, wherein said overall compensation gain calculation means includes: a second absolute value detection circuit for detecting an absolute value (PCo) of said overall current instruction value (iCo) to generate as a second absolute value;   a second hold circuit for holding a maximum value (PCmaxo) of said second absolute value for a second fixed time to generate as a second maximum value; and   a second gain determining circuit for determining said overall compensation gain (KC) based on said second maximum value.   
     
     
       4. The device for suppressing voltage fluctuation and higher harmonics according to claim 3, wherein: said second gain determining circuit determines said overall compensation gain (KC) such that when said second maximum value is smaller than a second predetermined value said overall compensation gain (KC) is 1, and when said second maximum value is not smaller than said second predetermined value said overall compensation gain (KC) is inverse proportional to said second maximum value. fundamental wave negative phase sequence power to generate as a first absolute value;   a first hold circuit (22B) for holding a maximum value (PNmax) of said first absolute value for a first fixed time to generate as a first maximum value;   a second absolute value detection circuit (22D) for detecting an absolute value (PH) of said harmonic current current (iH) to generate as a second absolute value;   a second hold circuit (22E) for holding a maximum value (PHmax) of said second absolute value for a second fixed time to generate as a second maximum value;   a third hold circuit (22F) for holding a maximum value (QLmax) of said reactive power (QL) of said load for a third fixed time to generate as a third maximum value; and   a gain determining circuit (22G) for determining said compensation gain (KQ) for said reactive power component, said compensation gain (KN) for said negative phase sequence current component, and said compensation gain (KH) for said harmonic current component, based on said first maximum value (PNmax), said second maximum value (PHmax), and said third maximum value (QLmax).   
     
     
       5. A device for suppressing voltage fluctuation and higher harmonics of a power source system which supplies power to a load with large power fluctuation and large harmonic current, said device comprising: a self-commutated converter arranged in parallel with said load; and   a control circuit for controlling said self-commutated converter;   said control circuit comprising:   compensation current variable calculation means for calculating a plurality of compensation current variables based on electrical quantities of said power source system and said load;   compensation gain calculation means for determining at least one compensation gain based on said at least one compensation current variable;   current instruction value calculation means for calculating a plurality of respective current instruction values based on said compensation gain and a plurality of said respective current compensation variables; and   overall current instruction value calculation means for calculating an overall current instruction value by combining said plurality of current instruction values;   wherein said compensation current variable calculation means calculates said plurality of compensation current variables including compensation current variables for reactive power component for negative phase sequence current component and for harmonic current component based on a current and a voltage of said power source system and a load current; and   said current instruction value calculation means calculates said plurality of respective current instruction values including current instruction values for reactive power component, for negative phase sequence current component and for harmonic current component based on said compensation gain and said respective compensation current variables;   wherein in said compensation current variable calculation means, said compensation current variable for reactive power component includes a reactive power (QL) of said load, said compensation current variable for negative phase sequence current component includes an instantaneous real power (pN) and an instantaneous imaginary power (qN) of a fundamental wave negative phase sequence power, and said compensation current variable for harmonic current component includes a harmonic current (iH) of said power source system;   wherein said compensation gain calculation means determines said compensation gain (KQ) for said reactive power component, said compensation gain (KN) for said negative phase sequence current component, and said compensation gain (KH) for said harmonic current component, based on said reactive power (QL) of said load, said instantaneous real power (pN) and said instantaneous imaginary power (qN) of said fundamental wave negative phase sequence power, and said harmonic current (iH) of said power source system; and   wherein current instruction value calculation means calculates said current instruction value (iQo) for reactive power component based on said compensation gain (KQ) for reactive power component and said reactive power (QL) of said load, calculates said current instruction value (iNo) for negative phase sequence current component based on said compensation gain (KN) for said negative phase sequence current component and said instantaneous real power (pN) and said instantaneous imaginary power (qN) of said fundamental wave negative phase sequence power, and calculates said current instruction value (iHo) for harmonic current component based on said compensation gain (KH) for harmonic current component and said harmonic current (iH);   wherein, said compensation gain calculation means includes:   a first absolute value detection circuit for detecting an absolute value (PN) of said negative phase sequence power based on said instantaneous real power (pN) and said instantaneous imaginary power (qN) of said fundamental wave negative phase sequence power to generate as a first absolute value;   a first hold circuit for holding a maximum value (PNmax) of said first absolute value for a first fixed time to generate as a first maximum value;   a second absolute value detection circuit for detecting an absolute value (PH) of said harmonic current (iH) to generate as a second absolute value;   a second hold circuit for holding a maximum value (PHmax) of said second absolute value for a second fixed time to generate as a second maximum value;   a third hold circuit for holding a maximum value (QLmax) of said reactive power (QL) of said load for a third fixed time to generate as a third maximum value; and   a gain determining circuit for determining said compensation gain (KQ) for said reactive power component, said compensation gain (KN) for said negative phase sequence current component, and said compensation gain (KH) for said harmonic current component, based on said first maximum value (PNmax), said second maximum value (PHmax), and said third maximum value (QLmax).   
     
     
       6. The device for suppressing voltage fluctuation and higher harmonics according to claim 5, wherein, said current instruction value calculation means includes: an instantaneous current calculation circuit connected to receive said reactive power (QL) of said load for generating a detection value (iQ) for said reactive power component;   a multiplier circuit for generating said current instruction value (iQo) for said reactive power component by multiplying said detection value (iQ) for said reactive power component and said compensation gain (KQ) for said reactive power component;   an instantaneous current calculation circuit connected to receive said instantaneous real power (pN) and said instantaneous imaginary power (qN) of said fundamental wave negative phase sequence power for generating a detection value (iN) for said negative phase sequence current;   a multiplier circuit for generating said current instruction value (iNo) for said negative phase sequence current component by multiplying said detection value (iN) for said negative phase sequence current and said compensation gain (KN) for said negative phase sequence current component; and   a multiplier circuit for generating said current instruction value (iHo) for said harmonic current component by multiplying said harmonic current (iH) and said compensation gain (KH) for harmonic current component.