Electro-Optic device having pairs of complementary transistors
Abstract
A novel structure of an active electro-optic device is disclosed. The device is provided with complementary transistors therein which comprise a p-channel TFT and an n-channel TFT. In case of a liquid crystal electro-optic device, the device comprises a pair of substrates, a liquid crystal provided therebetween, picture element electrode islands arranged in matrix form and provided on one of the substrates, complementary transistors provided thereon, and signal lines provided thereon. Gate electrodes of p-channel and n-channel transistors of these complementary transistors are connected to some of the signal lines while source (or drain) electrodes thereof are connected to the electrode islands and drain (or source) electrodes thereof are connected to other signal lines.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A thin film transistor comprising: a substrate having an insulating surface; a semiconductor layer including at least source, drain regions and a channel region interposed therebetween, said semiconductor layer being directly adjacent the insulating surface of the substrate; and a gate insulating layer on and directly adjacent to the semiconductor layer; a gate electrode formed on and directly adjacent said gate insulating layer; wherein said gate electrode comprises an anodizable material, and at least a side surface of said gate electrode is covered with an anodic oxide of said gate electrode and a top surface of said gate electrode is in direct contact with an insulating material different in composition than said anodic oxide of the gate electrode, and wherein each boundary between said channel region and said source and drain regions is substantially aligned with a side surface of said gate electrode.
2. A thin film transistor comprising: a substrate having an insulating surface; a semiconductor layer directly formed on said insulating surface, said semiconductor layer including at least a pair of impurity semiconductor regions and a channel region interposed therebetween; a gate insulating layer on and directly adjacent to the channel semiconductor layer; a gate electrode formed on and directly adjacent to said gate insulating layer, said gate electrode comprising an anodizable material; wherein at least a side surface of said gate electrode is covered with an anodic oxide of said gate electrode and a top surface of said gate electrode is in direct contact with an insulating material different in composition than said anodic oxide of the gate electrode, and wherein said impurity semiconductor regions extend from an upper surface of said semiconductor layer to a bottom surface thereof.
3. A thin transistor formed in a pixel of an active matrix-type electro-optical device comprising: a substrate having an insulating surface; at least one pixel electrode formed on said insulating surface; and at least one thin film transistor connected to said pixel, said thin film transistor comprising (a) a semiconductor layer formed on the insulating surface of the substrate, said semiconductor layer including source and drain regions and a channel region interposed therebetween, (b) a gate insulating layer formed on and directly adjacent to said semiconductor layer and (c) a gate electrode formed on and directly adjacent to said gate insulating layer, wherein at least a side surface of said gate electrode is covered with an anodic oxide of said gate electrode and a top surface of said gate electrode is in direct contact with an insulating material different in composition than said oxide of the gate electrode, and wherein each boundary between said channel region and said source and drain regions is substantially aligned with a side surface of said gate electrode.
4. A thin film transistor formed in a pixel of an active matrix-type electro-optical device comprising: a substrate having an insulating surface; at least one pixel electrode formed on said insulating surface; at least one thin film transistor formed at said pixel, said transistor comprising (a) a semiconductor layer formed on the insulating surface of the substrate, said semiconductor layer including source and drain regions and a channel region interposed therebetween, (b), a gate insulating layer formed on and directly adjacent to said semiconductor layer and (c) a gate electrode formed on and directly adjacent to said gate insulating layer; a first wiring formed on said substrate in one direction and connected to said gate electrode; and a second wiring formed on said substrate in a direction orthogonal to said first wiring, wherein at least a side surface of said gate electrode is in direct contact with an anodic oxide of said gate electrode and a top surface of said gate electrode is in direct contact with an insulating material different in composition than said oxide of the gate electrode, and wherein each boundary between said channel region and said source and drain regions is substantially aligned with a side surface of said gate electrode.
5. The transistor of claim 4 wherein said second wiring is connected to either one of source or drain regions of said thin film transistor.
6. An active matrix electro-optical device comprising: a substrate having an insulating surface; a plurality of pixel electrodes formed on said surface in a matrix form; and a plurality of thin film transistors provided at said pixel electrodes, each of said thin film transistors comprising (a) a semiconductor layer formed on the insulating surface of the substrate, said semiconductor layer including source and drain regions and a channel region interposed therebetween, (b) a gate insulating layer formed on and directly adjacent to said channel layer and (c) a gate electrode formed on and directly adjacent to said gate insulating layer, wherein at least a side of said gate electrode is covered with an oxide of said gate electrode and a top surface of said gate electrode is in direct contact with an insulating material different in composition than said oxide of the gate electrode, and wherein each boundary between said channel region and said source and drain regions is substantially aligned with a side surface of said gate electrode.
7. The device of claim 6 wherein said oxide is an anodic oxide of said gate electrode.
8. The transistor of claims 1, 2, 3, 4, or 6 wherein said insulating material on the top surface of the gate electrode is silicon dioxide.
9. The electro-optical device of claim 6 wherein said gate electrode comprises a silicon containing metal selected from the group consisting of aluminum, molybdenum, tungsten, titanium, tantalum, and chromium.
10. The electro-optical device of claim 6 wherein said gate electrode comprises a metal selected from the group consisting of aluminum, molybdenum, tungsten, titanium, tantalum, and chromium.Join the waitlist — get patent alerts
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