Liquid crystal half-tone display with gray level uniformity

Abstract

A half-tone liquid crystal display panel having half-tone pixels, each comprising a plurality of sub-pixels including first and second sub-pixels. Activation voltage is supplied to the first sub-pixel from a TFT switch and to the second sub-pixel from the TFT switch through a coupling capacitor. The second sub-pixel includes a storage capacitor. Sensitivity of the activation voltage applied to the second sub-pixel resulting from capacitance non-uniformity across the panel is reduced by forming the coupling capacitor and the storage capacitor of the second sub-pixel with the same depositions utilizing a common dielectric layer. The capacitance of the storage capacitor of the second sub-pixel is designed large compared to the capacitance of the second sub-pixel.

I claim: 
     
       1. A half-tone pixel in a liquid crystal display, said half-tone pixel having a plurality of sub-pixels including first and second sub-pixels, comprising a switch for applying an activation signal to said first sub-pixel,   a first coupling capacitor for coupling said activation signal from said switch to said second sub-pixel, said first coupling capacitor having a first coupling capacitor dielectric, and   a storage capacitor coupled to said second sub-pixel, said storage capacitor having a storage capacitor dielectric,   said first coupling capacitor dielectric and said storage capacitor dielectric being formed as a common dielectric layer of substantially uniform thickness.   
     
     
       2. The pixel of claim 1 wherein said second sub-pixel has a capacitance and said storage capacitor has a capacitance, said storage capacitor and said second sub-pixel being constructed and arranged so that said capacitance of said storage capacitor is significantly larger than said capacitance of said second sub-pixel.   
     
     
       3. The pixel of claim 1 wherein said second sub-pixel has a capacitance and said storage capacitor has a capacitance, said storage capacitor and said second sub-pixel being constructed and arranged so that said capacitance of said storage capacitor is at least five times larger than said capacitance of said second sub-pixel.   
     
     
       4. The pixel of claim 1 wherein said activation signal applied to said first sub-pixel comprises a first sub-pixel voltage,   said activation signal applied to said second sub-pixel comprises a second sub-pixel voltage,   said second sub-pixel has a capacitance, and   said second sub-pixel voltage is related to said first sub-pixel voltage as follows:   V.sub.2 /V.sub.1 =1/[(C.sub.s2 /C.sub.c)+C.sub.lc2 /C.sub.c)+1]        where: V 1  =said first sub-pixel voltage   V 2  =said second sub-pixel voltage   C s2  =capacitance of said storage capacitor   C c  =capacitance of said first coupling capacitor   C lc2  =said capacitance of said second sub-pixel.     
     
     
       5. The pixel of claim 4 wherein said second sub-pixel has a capacitance and said storage capacitor has a capacitance, said storage capacitor and said second sub-pixel being constructed and arranged so that said capacitance of said storage capacitor is significantly larger than said capacitance of said second sub-pixel with C c  being correspondingly large to preserve the V 2  /V 1  ratio.   
     
     
       6. The pixel of claim 1 further including a plurality of coupling capacitors, including said first coupling capacitor, for coupling said activation signal from said switch to said second sub-pixel, said plurality of coupling capacitors having a respective plurality of coupling capacitor dielectrics, including said first coupling capacitor dielectric, said plurality of coupling capacitor dielectrics and said storage capacitor dielectric being formed as a common dielectric layer of substantially uniform thickness.   
     
     
       7. The pixel of claim 6 wherein said plurality of coupling capacitors comprise a plurality of serially connected coupling capacitors for coupling said activation signal from said switch to respective ones of said plurality of sub-pixels. 
     
     
       8. In a half-tone liquid crystal display having a half-tone pixel, said half-tone pixel having a plurality of sub-pixels including first and second sub-pixels, said second sub-pixel having a storage capacitor associated therewith, said display including a switch for applying an activation signal to said first sub-pixel, said half-tone pixel including a first coupling capacitor for coupling said activation signal from said switch to said second sub-pixel; a method for reducing sensitivity of said activation signal coupled to said second sub-pixel, comprising forming said first coupling capacitor and said storage capacitor with a common dielectric layer of substantially uniform thickness.   
     
     
       9. The method of claim 8 further comprising forming said storage capacitor with a capacitance substantially greater than the capacitance of said second sub-pixel. 
     
     
       10. The method of claim 8 wherein said half-tone pixel further includes a plurality of coupling capacitors, including said first coupling capacitor, for coupling said activation signal from said switch to said second sub-pixel, said method further comprising forming said plurality of coupling capacitors and said storage capacitor with a common dielectric layer of substantially uniform thickness.