Conversion circuit for removing line-by-line phase alternation

Abstract

The present invention includes a delay line for memorizing the chrominance composite signal for one horizontal time period of a phase alternating input signal and a switch alternatingly applying a first phase composite signal for one line and then the delayed first phase composite signal (from the output of the delay line) at its output based upon the application of the control signal. In one embodiment, the control signal is obtained by detecting the phase of the phase alternating signal, and more specifically by detecting the phase of the color burst. This is accomplished by first isolating the color burst signal by a switch triggered by the burst gate pulse, then passing the color burst to a phase discriminator to determine whether the phase alternating composite signal for a give line is in phase or out-of-phase with a reference signal. The output of the phase discriminator is applied to the set input of a flip-flop. The flip-flop is clocked by the horizontal sync signal and the output of the flip-flop controls the switch outputting an unalternating phase signal as either a first phase of the phase alternating signal or a delayed first phase signal thereof. The invention can be incorporated in an appratus for converting phase-alternating-line (PAL) signals to unalternating phase signals for processing on equipment adapted to handle NTSC signals.

We claim: 
     
       1. A circuit for converting phase alternating chrominance composite signals to unalternating chrominance composite signals, comprising: means for detecting a first phase of two phase, phase alternating line signals and for generating a control signal based thereon;   means for delaying a chrominance signal associated with said first phase for a predetermined horizontal time period;   means for outputting an undelayed chrominance signal upon application of said control signal and for outputting said chrominance signal delayed by said predetermined horizontal time period, in the absence of said control signal, whereby chrominance information for one line referenced to said first phase is substituted for chrominance information for a second line, referenced to the other said phase.   
     
     
       2. A circuit as claimed in claim 1 wherein said means for delaying delays all phase alternating chrominance composite signals and wherein the first and second lines include two consecutive phase alternating chrominance composite signals each having a first and second phase, and two consecutive lines of information output as said unalternating chrominance composite signals consist of repeated first lines, having first phase, of said consecutive phase alternating chrominance composite signals. 
     
     
       3. A circuit as claimed in claim 2 wherein said means for detecting includes a phase discriminator and means for generating said control signal for said predetermined horizontal time period when said phase discriminator detects a predetermined phase of said phase alternating chrominance composite signals. 
     
     
       4. A circuit as claimed in claim 3 wherein said means for generating said control signal is a bistable switch having a clock input to which is applied a horizontal sync signal of said phase alternating chrominance composite signals. 
     
     
       5. A circuit as claimed in claim 3 wherein said means for generating said control signal is means for producing an output signal over a predetermined interval of time when said phase discriminator detects said predetermined phase of said phase alternating chrominance composite signals. 
     
     
       6. A circuit as claimed in claim 3 including means for separating out a color burst signal from said phase alternating chrominance composite signals and for applying said color burst signals to said phase discriminator. 
     
     
       7. A circuit for converting chrominance portions of phase alternating composite signals to single phase composite signals comprising: means for generating first and second respective control signals for first and second alternating phases of said phase alternating composite signals;   means for delaying at least said first phase of said phase alternating composite signal for a predetermined horizontal time period to obtain a delayed first phase of said phase alternating composite signal;   means for outputting an undelayed first phase composite signal upon application of said first control signal and for outputting said delayed first phase composite signal upon application of said second control signal, thereby providing a composite signal having a single phase.