Circuit for internal current limiting in a fast high side power switch

Abstract

A current limiting circuit (200, 300, 400) for instantaneously limiting the peak current of a fast high side power switch (212) or power FET has a reference switch (213) or FET, a first comparator (218), a current source I CL , control circuitry (209), and a clamping circuit (238). The reference FET (213) is smaller than the power FET (212). The first comparator compares the voltage drop across the power FET (212) and compares it with the voltage drop across the reference FET (213) and produces a signal COMPOUT which initiates the turn-off of the power FET (212) if the voltage drop across the power FET (212), caused by a load current flowing through it, is greater than or equal to the reference FET voltage drop induced by I CL . The clamp circuit (238), having diodes (D 1 , D 2 ) and a tracking current source I' CL , disconnects the FETS (212, 213) from the comparator (218) when they are OFF. The circuit (200, 300, 400) may also have a second comparator (250) which protects the power switch (212) from a short circuit condition in the circuit (200, 300, 400).

I claim: 
     
       1. A current control circuit for use in switching regulator circuits including: a MOS device that is turned off and on to supply current to a load over a periodic, controllable duration of time, wherein the MOS device has an internal resistance which causes a voltage drop over the MOS device to increase substantially linearly for a linear increase in current flowing through the MOS device, and wherein there is a current limit voltage drop across the MOS device when the current flowing through the MOS device is at a level at which current limiting is desired; and   means responsive to the voltage drop across the MOS device for switching off the MOS device when the current limit voltage is reached.   
     
     
       2. The circuit of claim 1 wherein the means for switching has associated therewith an active common mode voltage range and further including: means for clamping the means for switching when the MOS device is turned off so that the means for switching operates in the active common mode voltage range.   
     
     
       3. The circuit of claim 2, wherein the clamping means comprises a transistor. 
     
     
       4. The circuit of claim 1, wherein the means for switching includes: means for monitoring the voltage drop across the MOS device and for switching off the MOS device if the voltage drop across the MOS device is not below a preselected level during a preselected time period.   
     
     
       5. The circuit of claim 2, further comprising: means for decoupling the means for switching from the MOS device when the MOS device is off.   
     
     
       6. A current control circuit, comprising: a power device having a substantially linear operating range associated therewith that is turned off and on to supply current to a load over a periodic, controllable duration of time, wherein the power device has an internal resistance such that, for a specified current level through the power device wherein the specified current level within the substantially linear operating region of the power device, there is a voltage drop across the power device that is substantially equal to the internal resistance multiplied by the specified current level through the power device;   means for providing a reference voltage which is substantially equal to the voltage drop across the power device when the power device is conducting at the specified current level;   means for comparing the reference voltage to the voltage drop across the power device to determine when the voltage drop across the power device exceeds the voltage drop across the reference device; and   means responsive to the comparing means for switching off the power device when the specified current level is reached.   
     
     
       7. The circuit of claim 6, wherein the means for comparing has associated therewith an active common mode voltage range and further including: means for clamping the circuit when the power device is turned off so that the means for comparing operates in the active common mode voltage range.   
     
     
       8. The circuit of claim 7, wherein the clamping means comprises a transistor. 
     
     
       9. The circuit of claim 7, further comprising: means for decoupling the means for comparing from the power device when the power device is off. 
     
     
       10. A current control circuit, comprising: a power device having a substantially linear operating range associated therewith that is turned off and on to supply current to a load over a periodic, controllable duration of time, wherein the power device has an internal resistance such that, for a specific current level through the power device, wherein the specified current level is within the substantially linear operating range of the power device, there is a voltage drop across the power device that is substantially equal to the internal resistance multiplied by the specific current level through the power device;   reference means coupled to the power device for providing a value of resistance which is proportional to and which tracks changes in the internal resistance of the power device;   means for supplying a reference current to the reference means, wherein the amount of reference current supplied is selected so that there is a voltage drop across the reference means which substantially equals the voltage drop across the power device when a specified limit level of current is flowing through the power device;   means for comparing the voltage drops across the power device and the reference means; and   means responsive to the comparing means for turning the power device off when the voltage drop across the power device exceeds the voltage drop across the reference device.   
     
     
       11. The circuit of claim 10 wherein the means for comparing has associated therewith an active common mode voltage range and further includes: means for clamping the circuit when the power device is turned off so that the means responsive to the voltage drop operates in the active common mode voltage range.   
     
     
       12. The circuit of claim 11, wherein the means for clamping comprises a transistor. 
     
     
       13. The circuit of claim 10, wherein the means for switching include: means for monitoring the voltage drop across the power device and for switching off the power device if the voltage drop across the power device is not below a preselected level during a preselected time period.   
     
     
       14. The circuit of claim 11, further comprising: means for decoupling the means for comparing from the power device and the reference means when the power device is off.   
     
     
       15. The circuit of claim 14, wherein the disconnecting means further disconnects the reference current from the reference means when the power device is off. 
     
     
       16. A circuit comprising: a first MOS means having an internal resistance for connecting a load to a power source, the first MOS means being switched on and off and having a current at a first level associated therewith, wherein the current causes a voltage drop across the first MOS means which increase substantially linearly for a linear increase in current flowing through the first MOS means;   MOS means for mimicking the current flowing through the first MOS means at a lower level than the first level and for mimicking the internal resistance of the first MOS means at a higher level so that a voltage is produced across the mimicking MOS means which is substantially equal to the voltage drop across the first MOS means for the first level of current flow through it;   means for comparing the voltage across the first MOS means and the voltage across the mimicking MOS means and generating a signal indicating the results of the comparison; and   means for switching off the first MOS means when the voltage from the first MOS means is substantially equal to the voltage from the mimicking MOS means.   
     
     
       17. The circuit of claim 16, wherein the means for comparing has associated therewith an active common mode voltage range and further includes: means for clamping the circuit when the first MOS means is turned off so that the means for comparing operates in the common mode active range.   
     
     
       18. The circuit of claim 17, wherein the clamping means comprises a transistor. 
     
     
       19. The circuit of claim 16, wherein the means for switching includes: means for monitoring the voltage drop across the first MOS means and for switching off the first MOS means if the voltage drop across the first MOS means is not at below a preselected level during a preselected time period.   
     
     
       20. The circuit of claim 17, further comprising: means for decoupling the means for comparing from the first MOS means and the mimicking MOS means when the first MOS means is off.