Scan converter apparatus

Abstract

A scan converter apparatus, for converting an input video signal having a line frequency fH1 into an output video signal having a line frequency of substantially fH2, has means for generating a signal with a line frequency m/n times the horizontal synchronizing signal of the input video signal by approximating a line frequency ratio of fH1/fH2 to n/m, where m and n are both integers, and controlling the reading operation from a memory in synchronism with the resultant line frequency signal to thereby produce the output video signal, so that even when the line frequency fH2 is not an integer multiple of the line frequency fH1, it is possible to satisfactorily obtain the output video signal of which the horizontal line frequency is fH2.

I claim as my invention: 
     
       1. A scan converter apparatus for converting an input video signal having a line frequency f H1  into an output video signal of which the line frequency is substantially f H2  comprising: (a) memory means for storing said input video signal in synchronism with its horizontal synchronizing signal;   (b) means for approximating a ratio f H1  /f H2  between said line frequencies of said input and output video signals to n/m (where m and n are both integers);   (c) a phase-locked loop circuit including a phase comparator, a low-pass filter and a voltage-controlled oscillator connected to receive the horizontal synchronizing signal of said input video signal and for generating a modified frequency signal having a line frequency m/n times the line frequency f H1  of said input video signal;   (d) control means for controlling the reading operation from said memory in synchronism with said modified frequency signal to thereby generate said output video signal;   (e) said horizontal synchronizing signal of said input video signal being supplied through a frequency divider having a frequency dividing ratio of 1/n to said phase comparator in said phase locked loop circuit; and   (f) means for supplying an output from said voltagecontrolled oscillator in said phase locked loop circuit through a frequency divider having a frequency dividing ratio of 1/m to said phase comparator.   
     
     
       2. A scan converter apparatus according to claim 1, wherein a frequency divider having a frequency dividing ratio of 1/A (where A is an integer) is connected between said voltage-controlled oscillator and said frequency divider having the frequency dividing ratio of 1/m, and means for connecting the output from said voltage-controlled socillator to the read clock input of said memory. 
     
     
       3. A scan converter apparatus according to claim 2, including means for deriving the line frequency signal of said output video signal from an output of said frequency divider having the frequency dividing ratio of 1/A. 
     
     
       4. A scan converter appartus according to claim 1, including a pair of read-only-memories, means connecting said dividing ratios of 1/n and 1/m to said read-only memories to receive from said read-only memories the values n and m, in response to the line frequency of said input video signal. 
     
     
       5. A scan converter apparatus according to claim 4, further comprising means for detecting an output level of said low-pass filter, and means for controlling the reading operation from said read-only memories in response to detected output from said detecting means. 
     
     
       6. A scan converter apparatus according to claim 5, wherein said read-only memories store a plurality of conversion tables by which said values n and m are determined, in response to said line frequency of said input video signal. 
     
     
       7. A scan converter apparatus according to claim 6, wherein said detecting means detects whether or not the output level of said low-pass filter falls within a predetermined range and the addresses of said read-only memories are incremented or decremented when said output level is out of said predetermined range. 
     
     
       8. A scan converter apparatus for converting an input video signal having a line frequency f H1  into an output video signal of which the line frequency is substantially f H2  comprising: (a) memory means for storing said input video signal in synchronism with its horizontal synchronizing signal;   (b) means for approximating a ratio f H1  /f H2  between said line frequency of said input and output video signals to n/m (where the ratio of m to n is not an integer);   (c) a phase-lock loop circuit including a phase comparator, a low-pass filter and a voltage-controlled oscillator connected to receive the horizontal sychronizing signal of said input video signal and for generating a modified frequency signal having a line frequency m/n times the line frequency f H1  of the input vide signal; and   (d) control means for controlling the reading operation from said memory in synchronism with said modified frequency signal to thereby generate an output video signal.