US4762804AExpiredUtility

Method of manufacturing a bipolar transistor having emitter series resistors

Assignee: PHILIPS CORPPriority: Oct 12, 1984Filed: Jan 23, 1987Granted: Aug 9, 1988
Est. expiryOct 12, 2004(expired)· nominal 20-yr term from priority
H10D 84/125H10D 62/135H10D 10/058
24
PatentIndex Score
2
Cited by
11
References
3
Claims

Abstract

A method is set forth of manufacturing a bipolar transistor with emitter ballast resistors. According to the invention, a base window and a strip-shaped opening are formed beside each other on a collector region. The strip-shaped opening is first covered by a masking layer and then doping of the base is provided. After removal of the masking layer, oxide layers of the same thickness are formed in the base window and in the strip-shaped opening. After formation of emitter fingers, base contact windows are formed within the base zone, and resistance windows are formed within the strip-shaped opening, whereupon simultaneously base contact zones and mutually separated emitter ballast resistors are formed in these windows.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method of manufacturing a semiconductor device with a bipolar transistor, said method comprising the steps of (a) providing a surface adjacent collector region of a first conductivity type,   (b) providing an insulating layer on said collector region,   (c) forming in said insulating layer a base window and a rectangular opening adjacent to said base window,   (d) covering said rectangular opening by a masking layer,   (e) introducing a dopant determining the second, opposite conductivity type in said collector region through said base window to form a base zone,   (f) removing said masking layer,   (g) forming by thermal oxidation first and second oxide layers of substantially equal thickness in said base window and in said rectangular opening, respectively,   (h) forming a plurality of emitter windows in said first oxide layer in said base window,   (i) introducing a dopant determining said first conductivity type in said base zone through said plurality of emitter windows to form a plurality of emitter zones,   (j) then simultaneously etching a plurality of mutually separated resistance windows in said second oxide layer in said rectangular opening and a plurality of base contact windows in said first oxide layer of said base window, using an etching mask,   (k) forming a plurality of base contact zones and a plurality of emitter series resistors by introducing a dopant determining said second conductivity type through said etching mask into said base contact windows and said resistance windows, and   (l) providing connection conductors between said plurality of resistors and an emitter connection, providing a plurality of emitter electrodes between said resistors and said emitter zones, and providing a plurality of base electrodes between said base regions and a base connection.   
     
     
       2. A method as claimed in claim 1, characterized in that the base doping, and base contact and the resistance doping as well as the emitter doping are all effected by ion implantation. 
     
     
       3. A method as claimed in claim 2, characterized in that the masking layer and the etching mask consist of photoresist.

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