Apparatus for generating a common output signal as a function of any of a plurality of diverse input signals

Abstract

A circuit for generating a common signal as a function of either of two reference signals comprises a pair of phase-locked loops which share an oscillator. Each phase-locked loop generates a control signal as a function of one of the reference signals. One or the other of the control signals is coupled to the oscillator which generates the common signal. A comparator compares the two control signals and generates a signal indicative of their difference. While the control signal generated by the first phase-locked loop is coupled to the oscillator, the difference signal is applied to the second phase-locked loop where it controls the generation of the second control signal to minimize the difference between the two control signals. While the control signal generated by the second phase-locked loop is coupled to the oscillator, the second phase-locked loop is nonresponsive to the difference signal. Thus when a switch of reference signals occurs even if they are of different phase and even if that phase is slowly time-varying, the circuit can lock to the new reference signal at a phase dictated by the phase difference between the two references at the instant of the switch without causing the oscillator output to undergo significant frequency or phase changes.

What is claimed is: 
     
       1. A circuit for generating at least one common signal as a function of any of a plurality of input signals, comprising: first means for supplying said plurality of input signals;   second means for generating said at least one common signal in response to at least one of a plurality of control signals;   plurality of third means each for controllably generating at least one of said plurality of control signals as a function of the difference between at least one of said plurality of input signals and said at least one common signal;   fourth means for selectively coupling at least one of said plurality of said control signals to said second means; and   fifth means selectively responsive to at least one of said plurality of control signals for controlling generation by the third means of at least the control signals other than said at least one control signal to which said fifth means are responsive.   
     
     
       2. The circuit of claim 1 wherein said plurality of input signals and said at least one common signal are time varying signals and wherein each of said third means comprise means for controllably generating said at least one control signal as a function of the phase difference between said at least one of said plurality of input signals and said at least one common signal. 
     
     
       3. The circuit of claim 1 wherein said fifth means comprise means for controlling generation by the third means of at least the control signals other than said at least one control signal to which said fifth means are responsive, to minimize the difference between said at least one control signal to which said fifth means are responsive and said other control signals. 
     
     
       4. A circuit for generating at least one common signal as a function of any of a plurality of input signals, comprising: first means for supplying said plurality of input signals;   second means for generating said at least one common signal in response to at least one of a plurality of control signals;   plurality of third means each for controllably generating at least one of said plurality of control signals in response to at least one of said plurality of input signals;   fourth means for selectively coupling at least one of said plurality of control signals to said second means; and   fifth means selectively responsive to at least one control signal of said at least one control signal coupled to said second means for controlling generation by the third means of at least the control signals other than said at least one control signal to which said fifth means are responsive.   
     
     
       5. The circuit of claim 4 wherein said fifth means comprise: means for comparing said at least one control signal to which said fifth means are responsive with said other control signals and for generating at least one difference signal indicative of their difference; and   means selectively responsive to said at least one difference signal for controlling generation by the third means of at least said other control signals to minimize the difference between said at least one control signal to which said fifth means are responsive and said other control signals.   
     
     
       6. A circuit for generating a common signal as a function of any of a plurality of input signals, comprising: first means for supplying said plurality of input signals;   second means for generating said common signal in response to one of plurality of control signals;   plurality of third means each for controllably generating one of said plurality of control signals in response to one of said plurality of input signals;   fourth means for selectively coupling one of said plurality of control signals to said second means; and   fifth means selectively responsive to said one control signal coupled to said second means for controlling generation by the third means of the control signals other than said one control signal coupled to said second means.   
     
     
       7. The circuit of claim 6 wherein each of said third means comprise means for generating said control signal as a function of the difference between said one of said plurality of input signals and said common signal. 
     
     
       8. The circuit of claim 6 wherein said plurality of input signals and said common signal are time varying signals and wherein each of said third means comprise means for controllably generating said one of said plurality of control signals as a function of the phase difference between said one of said plurality of input signals and said common signal. 
     
     
       9. The circuit of claim 6 wherein said fifth means comprise means for controlling generation by the third means of said other control signals to minimize the difference between said one control signal coupled to said second means and said other control signals. 
     
     
       10. The circuit of claim 6 wherein said fifth means comprise: at least one sixth means for comparing said one control signal coupled to said second means with one of said other control signals and for generating a difference signal indicative of their difference; and   at least one seventh means each associated with one of said at least one sixth means and selectively responsive to said difference signal for controlling generation by the third means of said one of said other control signals to minimize the difference between said one control signal coupled to said second means and said one of said other control signals.   
     
     
       11. The circuit of claim 10 further comprising eighth means for making said seventh means nonresponsive to said difference signal while said fourth means couple said one of said other control signals to said second means. 
     
     
       12. A circuit for generating a common signal as a function of any of a plurality of input signals, comprising: means for supplying a first and a second input signal;   means for generating said common signal in response to one of a first and a second control signal;   first means for generating said first control signal in response to said first input signal;   second means for controllably generating said second control signal in response to said second input signal;   means for selectively coupling one of said first and said second control signals to said common signal generating means; and   control means selectively responsive to said first control signal for controlling generation of said second control signal by said second means to minimize the difference between said first and second control signals.   
     
     
       13. The circuit of claim 12 wherein said first means controllably generate said first control signal, the circuit further comprising: control means selectively responsive to said first control signal for controlling generation of said second control signal by said first means to minimize the difference between said first and second control signals.   
     
     
       14. The circuit of claim 12 wherein said first means comprise means for generating said first control signal as a function of the difference between said common signal and said first input signal, and wherein   said second means comprise means for controllably generating said second control signal as a function of the difference between said common signal and said second input signal.   
     
     
       15. The circuit of claim 12 wherein said input signals are time varying signals; wherein   said first means comprise means for generating said first control signal as a function of the phase difference between said common signal and said first input signal; and wherein   said second means comprise means for controllably generating said second control signal as a function of the phase difference between said common signal and said second input signal.   
     
     
       16. The circuit of claim 12 wherein said control means comprise: third means for comparing said first control signal with said second control signal and for generating a difference signal indicative of their difference; and   fourth means selectively responsive to said difference signal for controlling generation of said second control signal by said second means to minimize the difference between said first and said second control signals.   
     
     
       17. The circuit of claim 16 further comprising means for making said fourth means responsive to said difference signal only while said selective coupling means couple said first control signal to said common signal generating means. 
     
     
       18. The circuit of claim 12 further comprising means for making said control means responsive to said first control signal while said selective coupling means couple said first control signal to said common signal generating means. 
     
     
       19. The circuit of claim 12 wherein said means for generating said common signal comprise a voltage controlled oscillator and wherein each of said first and second control signals comprises a voltage level signal. 
     
     
       20. A circuit for generating a common signal as a function of any of a plurality of reference signals, comprising: means for supplying a first and a second reference signal;   an oscillator for generating said common signal in response to one of a first and a second control signals;   first means for generating said first control signal in response to said first reference signal;   second means for generating said second control signal in response to said second reference signal;   means for selectively coupling said first and said second control signals to said oscillator;   means for comparing said first control signal with said second control signal and for generating a difference signal indicative of their difference; and   means selectively responsive to said difference signal for controlling said second means to minimize the difference between said first and said second control signals.   
     
     
       21. A circuit for generating a common signal as a function of any of a plurality of reference signals, comprising: means for supplying a first and a second reference signals;   a first and a second phase-locked loop circuit sharing an oscillator for generating said common signal in response to one of a first and a second control signals, said first phase-locked loop circuit further having a first portion for generating said first control signal in response to said first reference signal and said common signal, and said second phase-locked loop circuit further having a second portion for generating said second control signal in response to said second reference signal and said common signal;   switching means for selectively coupling said first and said second control signals to said oscillator;   means for comparing said first and said second control signals and for generating a difference signal indicative of their difference; and   means selectively responsive to said difference signal for controlling said second portion to minimize said difference between said first and said second control signals.   
     
     
       22. A circuit for generating a common signal as a function of any of a plurality of reference signals, comprising: means for supplying a first and a second reference signals;   an oscillator for generating said common signal, said oscillator responsive to a selected one of a first and second control signals to adjust said phase difference between said first reference signal and said common signal to a first predetermined value;   means for generating a third signal representative of the phase difference between said first reference signal and said common signal,   means responsive to said third signal for generating said first control signal;   means for generating a fourth signal representative of the phase difference between said second reference signal and said common signal;   means responsive to said fourth signal for generating said second control signal;   switching means for selectively connecting said oscillator to one of said first and said second control signals;   means for comparing said first control signal with said second control signal and for generating a fifth signal indicative of their difference;   control means responsive to said fifth signal for selectively controlling said second control signal generating means to minimize the difference between said first and said second control signals; and   means for disabling said control means from changing their state while said switching means connect said second control signal to said oscillator.