Inverter firing control with pulse averaging error compensation

Abstract

A pole switch firing control for a pulse width modulated inverter controls pole switch operation under steady state operating conditions such that the inverter output duplicates a reference signal waveform after a fixed time delay. Average pole switch operating time for a given pulse in an inverter output cycle is measured by obtaining an average number of clock pulses which occur during the delay time of the associated pole switch for a given number of preceding inverter output cycles. This average count then serves as a starting point for a presettable counter which begins to count upon the occurrence of a transition point in the reference waveform. When the presettable counter reaches a preselected count, the pole switch operating cycle is initiated, thereby causing the pole switch to operate at a fixed time following a transition point in the reference signal.

What is claimed is: 
     
       1. A pole switch firing control circuit for controlling a pulse width modulated inverter in accordance with a reference pulse signal, said control circuit comprising: means for receiving a clock signal containing voltage pulses;   means for generating a control signal having transition points for initiating a pole switch switching sequence in the inverter;   a first counter, being presettable to start counting from a supplied number, for counting the number of said clock voltage pulses which occur between a selected transition point in said control signal and the switching of an associated pole switch and for dividing the counted number by a preselected number N to obtain an approximate average count equal to the sum of said supplied number and the counted number of clock pulses divided by N;   memory means for storing the approximate average count counted by said first counter during each pole switch switching sequence;   means for generating said supplied number wherein said supplied number is equal a selected previous approximate average count multiplied by the factor (N-1)/N; and   a second counter, being presettable to start counting at a selected previous approximate average count, and connected to count said clock voltage pulses which occur after a preselected transition point in said reference signal until a predetermined count has been reached, whereupon said second counter produces a carry output signal pulse which causes said means for generating a control signal to create a second transition point in said control signal, to initiate a second pole switch switching sequence in the inverter.   
     
     
       2. A pole switch firing control circuit as recited in claim 1, further comprising: means for transferring the stored approximate average count for a selected pole switch to said second counter when said selected pole switch will be the next pole switch to be fired.   
     
     
       3. A pole switch firing control circuit as recited in claim 2, wherein said memory means comprises a shift register and said means for transferring comprises a one-shot multivibrator connected to the shift input of said shift register. 
     
     
       4. A pole switch firing control circuit as recited in claim 1, wherein said means for generating said supplied number comprises: an adder circuit having a first set of inputs connected to receive said selected previous approximate average count in binary form, having a second set of inputs connected to receive the binay complement of a portion of said selected previous approximate average which has ben shifted at least one bit, and having a carry-in input connected to a logic one, whereby the output of said adder circuit is equal to said selected previous approximate average multiplied by the factor (N-1)/N.   
     
     
       5. A pole switch firing control circuit as recited in claim 1, wherein said means for generating a control signal comprises a flip-flop circuit. 
     
     
       6. A pole switch firing control circuit as recited in claim 5, wherein said flip-flop circuit comprises: a type D flip-flop circuit having a D input connected to receive said reference pulse signal and having a clock input connected to receive said carry output signal.   
     
     
       7. A pole switch firing control circuit as recited in claim 1, further comprising: means for providing only complete clock voltage pulses to said first counter.   
     
     
       8. A pole switch firing control circuit as recited in claim 7, wherein said means for providing only complete clock voltage pulses to said first counter comprises: an AND gate having its output connected to said first counter and having two inputs with a first of said two inputs being connected to said means for receiving a clock signal;   a flip-flop circuit having a clock input and a Q output, with said Q output being connected to a second one of said two AND gate inputs; and   an inverter having an input connected to said means for receiving a clock signal and having an output connected to said flip-flop circuit clock input.   
     
     
       9. A method of controlling the switching of a power pole switch in a pulse width modulated inverter in accordance with a reference pulse signal, said method comprising the steps of: measuring the switching time of said pole switch for a plurality of switching cycles;   averaging the measured switching times;   subtracting the resulting average switching time from a preselected fixed time interval to obtain a firing time period; and   initiating a switching sequence for said pole switch after a period equal to said firing time period following a transition point in said reference pulse signal.   
     
     
       10. A method of controlling the switching of a power pole switch in a pulse width modulated inverter in accordance with a reference pulse signal, said method comprising the steps of: measuring the switching time of said pole switch for a preselected number of switching cycles N;   averaging the measured switching times;   multiplying the resulting average by the factor (N-1)/N to obtain a first time estimate;   measuring the switching time of said pole switch for an additional switching cycle;   dividing the measured switching time of said additional switching cycle by N and adding the resulting product to said first time estimate to obtain an approximate average switching time;   subtracting said approximate average switching time from a preselected fixed time interval to obtain a firing time period; and   initiating a switching sequence for said pole switch after a period equal to said firing time period following a transition point in said reference signal.   
     
     
       11. A method of controlling the switching of a power pole switch in a pulse width modulated inverter in accordance with a reference pulse signal, said method comprising the steps of: counting a series of clock pulses, which occur between a preselected transition point in a control signal and the switching of a power pole switch in response to said transition point, with a first counter;   dividing the number of clock pulses, counted by said first counter, by a preselected number N to obtain an incremental count;   adding said incremental count to an approximate average number of clock pulses counted by said first counter in the preceding N switching cycles of said power pole switch to obtain a new approximate average count;   presetting a second counter at a count equal to said new approximate average count;   operating said second counter to count clock pulses, beginning at said new approximate average count, when a preselected transition point occurs in a reference signal; and   causing a second transition point in said control signal to occur when said second counter reaches a predetermined count, thereby initiating a switching operation in said power pole switch.