Combination weighing machine

Abstract

A combination weighing machine, used for packing a plurality of articles in individual bags or the like so that the weight of each pack becomes substantially equal to a predetermined target value, by weighing a plurality of articles by a plurality of weighing balances at the same time and combining some of them appropriately to form a group of articles having a total weight approximating to the target value, and constructed such that a pair of combinations providing total weights which are nearest the target value of all are searched and selected out of a predetermined set of combinations respectively for both positive and negative deviations with respect to the target value, thereby enabling the election of one of them in accordance with a predetermined order of preference.

What is claimed is: 
     
       1. A combination weighing machine, comprising a plurality of weighing balances for weighing articles respectively to produce electric signals indicative of the measured weights, an adder having a plurality of inputs for summing incoming signals to produce a sum signal, a plurality of controlled normally-open switches coupled respectively between said balances and said inputs of said adder, a switch control circuit having a plurality of output terminals coupled respectively to the control terminals of said switches for producing control signals from those of said output terminals which are successively selected in accordance with a predetermined set of combinations to close corresponding ones of said switches and producing an end signal upon completion of all of said combinations, a judging circuit coupled to the output of said adder for comparing said sum signal with a predetermined reference value to produce an acceptance signal when a predetermined condition with respect to said reference value is fulfilled, and a combination memory coupled to the output terminals of said switch control circuit for updating its content with the current inputs in response to said acceptance signal and supplying its content to utilization means in response to said end signal, said judging circuit including a subtracter coupled to the output of said adder to calculate deviation of said sum signal from a predetermined target value, a polarity discriminating comparator coupled to the output of said subtracter for discriminating the polarity of said deviation to produce an output in the case of a predetermined polarity, a deviation memory coupled to the output of said subtracter for updating its content with the current input in response to said acceptance signal, a comparator having inputs coupled to the outputs of said subtracter and said deviation memory for producing an output signal when the absolute value of the former output is less than the absolute value of the latter output, a pair of EXCLUSIVE OR gates with one OR gate having an input coupled to the output of the last said comparator and the other OR gate having an input coupled to said polarity discriminating comparator, polarity specifying means for applying a signal selectively to the other inputs of said EXCLUSIVE OR gates to specify desired polarity, and an AND circuit connected to said EXCLUSIVE OR gates for producing said acceptance signal in response to the output signals of said EXCLUSIVE OR gates. 
     
     
       2. A combination weighing machine, comprising a plurality of weighing balances for weighing articles respectively to produce electric signals indicative of the measured weights, an adder having a plurality of inputs for summing incoming signals to produce a sum signal, a plurality of controlled normally-open switches coupled respectively between said balances and said inputs of said adder, a switch control circuit having a plurality of output terminals coupled respectively to the control terminals of said switches for producing control signals from those of said output terminals which are successively selected in accordance with a predetermined set of combinations to close corresponding ones of said switches and producing an end signal upon completion of all of said combinations, a judging circuit coupled to the output of said adder for comparing said sum signal with a predetermined reference value to produce an acceptance signal when a predetermined condition with respect to said reference value is fulfilled, and a combination memory coupled to the output terminals of said switch control circuit for updating its content with the current inputs in response to said acceptance signal and supplying its content to utilization means in response to said end signal, said judging circuit including a polarity discrimination comparator coupled to the output of said adder for discriminating polarity of deviation of said sum signal with respect to a predetermined target value to produce an output signal in case of a predetermined polarity, a sum memory coupled to the output of said adder for responding to said acceptance signal to update its content with the current input, a comparator coupled to said adder and sum memory for comparing the output of said adder with the content of said sum memory to produce an output signal when the former is nearer said target value than the latter, a pair of EXCLUSIVE OR gates with one OR gate having an input coupled to the output of the last said comparator and the other OR gate having an input coupled to said polarity discriminating comparator, polarity specifying means for applying a signal selectively to the other inputs of said EXCLUSIVE OR gates to specify desired polarity and an AND circuit connected to said EXCLUSIVE OR gates for producing said acceptance signal in response to the output signals of said EXCLUSIVE OR gates. 
     
     
       3. A combination weighing machine, comprising a plurality of weighing balances for weighing articles respectively to produce electric signals indicative of the measured weights, an adder having a plurality of inputs for summing incoming signals to produce a sum signal, a plurality of controlled normally-open switches coupled respectively between said balances and said inputs of said adder, a switch control circuit having a plurality of output terminals coupled respectively to the control terminals of said switches for producing control signals from those of said output terminals which are successively selected in accordance with a predetermined set of combinations to close corresponding ones of said switches and producing an end signal upon completion of all of said combinations, a judging circuit coupled to the output of said adder for comparing said sum signals with a predetermined reference value to produce an acceptance signal when a predetermined condition with respect to said reference value is fulfilled, and a combination memory coupled to the output terminals of said switch control circuit for updating its content with the current inputs in response to said acceptance signal and supplying its content to utilization means in response to said end signal, said judging circuit including means coupled to the output of said adder for calculating deviation of said sum signal from a predetermined target value, a polarity discriminating comparator coupled to the output of the last said means for discriminating polarity of said deviation to produce first or second polarity signals indicative of said polarity, first and second deviation memories coupled to the output of the last said means for responding respectively to first and second acceptance signals to update their contents with the current input, first and second comparators coupled to the last said means and said first and second deviation memories, respectively, for comparing the output of the last said means with the contents of the memories to produce outputs, respectively, when the absolute value of the former is less than the absolute value of the latter, and first and second logic circuits for responding to the output signals of said first and second comparators and the first and second polarity signals of said polarity discriminating comparator to produce said first and second acceptance signals, said combination memory including a first portion for responding to said first acceptance signal to update its content and a second portion for responding to said second acceptance signal to update its content, said machine further comprising third and fourth comparators coupled to the outputs of said first and second deviation memories, respectively, for comparing the content of said memories with predetermined corresponding deviation ranges to produce outputs, respectively, when the contents fall within said ranges, and means coupled to the outputs of said third and fourth comparators and the outputs of said first and second portions of said combination memory for inhibiting the output from one of the portions of said combination memory corresponding to the other of said third and fourth comparators when at least a predetermined one of said comparators produces an output and inhibiting the output of the portion of said combination memory corresponding to said one of said third and fourth comparators when the last said one comparator produces no output. 
     
     
       4. A combination weighing machine, comprising a plurality of weighing balances for weighing articles respectively to produce electric signals indicative of the measured weights, an adder having a plurality of inputs for summing incoming signals to produce a sum signal, a plurality of controlled normally-open switches coupled respectively between said balances and said inputs of said adder, a switch control circuit having a plurality of output terminals coupled respectively to the control terminals of said switches for producing control signals from those of said output terminals which are successively selected in accordance with a predetermined set of combinations to close corresponding ones of said switches and producing an end signal upon completion of all of said combinations, a judging circuit coupled to the output of said adder for comparing said sum signals with a predetermined reference value to produce an acceptance signal when a predetermined condition with respect to said reference value is fulfilled, and a combination memory coupled to the output terminals of said switch control circuit for updating its content with the current inputs in response to said acceptance signal and supplying its content to utilization means in response to said end signal, said judging circuit including a polarity discriminating comparator coupled to the output of said adder for discriminating the sense of shift of said sum signal from a predetermined target value to produce a first or second polarity signal indicative of said sense, first and second sum memories coupled to the output of said adder for responding to first and second acceptance signals, respectively, to update their contents with the current inputs, first and second comparators coupled to said adder and said first and second sum memories for comparing the output of the former with the contents of the latter, respectively, to produce output signals when the former is nearer said target value than the latter, and first and second logic circuits for responding to the output signals of said first and second comparators and said first and second polarity signals to produce said first and second acceptance signals, said combination memory including a first portion for responding to said first acceptance signal to update its content and a second portion for responding to said second acceptance signal to update its content, said machine further comprising third and fourth comparators coupled to the outputs of said first and second sum memories, respectively, for comparing the contents of said memories with a predetermined allowable range to produce outputs, respectively, when the contents fall within said range, and means coupled to the outputs of said third and fourth comparators and the outputs of said fist and second portions of said combination memory corresponding to the other of said third and fourth comparators when at least one of said comparators produce an output and inhibiting the output of the portion of said combination memory corresponding to said one of said third and fourth comparators when the last said one comparator produces no output. 
     
     
       5. The method of delivering quantities of a product with each quantity being of an acceptable total weight relative to a predetermined reference weight, utilizing a plurality of weighing balances adapted to weigh fractions of said quantity, respectively and for unloading of said quantity fractions therefrom to collect them for delivery; said method comprising for each delivery the steps of presetting at least two ranges of weight having an order of priority about said reference weight; generating the values of combinations of quantity fractions of said product on the weighing balances; selecting two values from said values of combinations of weights, one being greater than and nearest to said reference weight, and the other being less than the nearest to said reference weight; and comparing said two values with said preset ranges of weight and unloading the quantity fractions from the weighing balances contributing to the value which is in the range of higher order of priority. 
     
     
       6. Apparatus for delivering quantities of a product with each quantity being of an acceptable totoal weight relative to a predetermined reference weight; comprising a plurality of weighing balances adapted to weight fractions of said quantity, respectively and for unloading of said product therefrom to collect them for delivery; means for generating the values of combinations of weights of said quantity fractions on the weighing balances; means for comparing said value of combinations of weights with said reference weight to select two values therefrom, one being greater than the nearest to said reference weight, and the other being less than and nearest to said reference weight; and means for comparing said selected two values with at least two ranges of weight having an order of priority and being preset about said reference weight, and means for unloading said product from the weighing balances contributing to the value which is in the range of weight of higher order of priority. 
     
     
       7. Apparatus for delivering quantities of a product with each quantity being of an acceptable total weight relative to a predetermined reference weight; comprising a combination weighing device including a plurality of weighing balances and unloading means for each balance, means for selecting two values of combinations of weights, one being greater than and nearest to said reference weight and the other being less than and nearest to said reference weight, means for storing said values and also information pertaining to the individual weighing balances contributing to said selected values during each cycle of combination operation; means for storing the extreme values of at least two ranges of weight having an order of priority and being preset about said reference weight; a logic circuit for reading said two values of combinations of weights and said information of said weighing balances stored in the first said storing means and said extreme values stored in the last said storing means to select one of said values of combinations of weights which is in the range of weight of the higher order of priority and to output the information of weighing balances contributing to said value; and means for supplying said output information from said logic circuit to said unloading means for unloading said product from the specified weighing balances.