Control device for a phase lock loop vernier frequency synthesizer

Abstract

Disclosed is a device for controlling the selection of divider factors in a vernier frequency synthesizer employing a pair of phase lock loops coupled through a mixer to supply a synthesized output signal frequency. The control device generates a pair of divider factors for the respective programmable dividers of the two loops which will generate a particular synthesized output frequency and avoids predetermined divider factors such as those which are not processable by programmed dividers of the loops or which would generate frequencies within the loops causing spurious mixing products with other signals. The control device preferably takes the form of a microprocessor.

I claim: 
     
       1. An apparatus for generating an output signal of a selected frequency comprising: means for generating first and second reference signals of different frequency;   a signal mixer;   a first phase lock loop frequency locked to said first reference signal for providing a first mixing signal to said mixer, said first phase lock loop including a first adjustable frequency changing device for changing the frequency of a signal within said first loop by an adjustable factor of N 1  ;   a second phase lock loop frequency locked to said second reference signal for providing a second mixing signal to said mixer, said second phase lock loop including a second adjustable frequency changing device for changing the frequency of a signal within said second loop by an adjustable factor of N 2 , said first and second phase lock loops controlling said mixer to provide an output signal having a frequency which is determined by said N 1  and N 2  factors;   means for selecting a desired frequency for said output signal; and,   a microprocessor responsive to said desired frequency selection means for determining N 1  and N 2  factors which will produce said desired frequency and for respectively applying determined N 1  and N 2  factors to said first and second frequency changing devices, said microprocessor preventing application of predetermined ones of the N 1  and N 2  factors, which could produce a selected desired frequency, to said first and second frequency changing devices.   
     
     
       2. An apparatus as in claim 1, wherein said microprocessor prevents selection of N 1  and N 2  factors which would generate said desired output frequency but which would cause generation of predetermined undesired frequency signals within said first and second phase lock loops. 
     
     
       3. An apparatus as in claims 1 or 2, wherein said microprocessor prevents selection of N 1  and N 2  factors which would generate said desired output frequency but which are not processable by said frequency changing devices. 
     
     
       4. An apparatus as in claim 3, wherein said microprocessor (a) calculates N 1  and N 2  factors for a selected output signal frequency and (b) determines whether one or both of said calculated N 1  and N 2  factors correspond to predetermined impermissible N 1  and N 2  factors, if one or both of said calculated N 1  and N 2  factors correspond to said predetermined impermissible N 1  and N 2  factors, said microprocessor repeats operations (a) and (b) until divider factors N 1  and N 2  are calculated which do not correspond to said predetermined impermissible N 1  and N 2  divider factors, said microprocessor applying calculated divider factors N 1  and N 2  which do not correspond to said predetermined impermissible divider factors N 1  and N 2  to said first and second frequency changing devices. 
     
     
       5. An apparatus as in claim 3, wherein said microprocessor calculates initial N 1  and N 2  factors for a selected output signal frequency and determines whether one or both of said initial N 1  and N 2  factors correspond to predetermined impermissible N 1  and N 2  factors, if one or both of said initial N 1  and N 2  factors correspond to predetermined impermissible N 1  and N 2  factors said microprocessor calculates new N 1  and N 2  factors for a selected output signal frequency and applies said new N 1  and N 2  factors to said first and second frequency changing devices, if said initial N 1  and N 2  factors do not correspond to predetermined impermissible N 1  and N 2  factors said microprocessor applies said initial N 1  and N 2  factors to said first and second frequency changing devices. 
     
     
       6. An apparatus as in claims 1 or 2, wherein said frequency changing devices are programmable frequency dividers. 
     
     
       7. An apparatus as in claim 6, wherein said programmable dividers contain variable modulus prescalers. 
     
     
       8. An apparatus for generating an output signal of a selected frequency comprising: means for generating first and second reference signals of different frequency;   a signal mixer;   a first phase lock loop frequency locked to said first reference signal for providing a first mixing signal to said mixer, said first phase lock loop including a first adjustable frequency changing device for changing the frequency of a signal within said first loop by an adjustable factor of N 1  ;   a second phase lock loop frequency locked to said second reference signal for providing a second mixing signal to said mixer, said second phase lock loop including a second adjustable frequency changing device for changing the frequency of a signal within said second loop by an adjustable factor of N 2 , said first and second phase lock loops controlling said mixer to provide an output signal having a frequency which is determined by said N 1  and N 2  factors;   means for selecting a desired frequency for said output signal; and,   control means responsive to said means for selecting for providing N 1  and N 2  factors to said first and second frequency changing devices to obtain said desired frequency, said control means selecting N 1  and N 2  factors which provide said desired frequency and preventing selection of N 1  and N 2  factors which would generate said desired frequency but which (a) are not processable by said first and second frequency changing devices or (b) would cause the generation of predetermined undesired frequency signals within said first and second phase lock loops.   
     
     
       9. An apparatus as in claim 8, wherein said control means comprises a memory storage device having permissible factors of N 1  and N 2  stored therein for each possible selected frequency for said output signal. 
     
     
       10. An apparatus as in claims 2 or 8, wherein said predetermined undesired frequencies are frequencies which cause spurious interference with other signals. 
     
     
       11. An apparatus as in claim 10, wherein said spurious interference is in the form of mixing products. 
     
     
       12. An apparatus as in claim 8, wherein said control means comprises: means for selecting a set of N 1  and N 2  factors capable of causing generating of a said output signal at said selected frequency;   means for storing impermissible N 1  and N 2  factors;   means for applying a selected set of N 1  and N 2  factors to said first and second frequency changing devices if selected N 1  and N 2  factors do not correspond to one of said stored impermissible N 1  and N 2  factors; and,   means for selecting and applying to said frequency changing devices a new set of N 1  and N 2  factors capable of causing generation of said output signal at said output frequency if previously selected N 1  and N 2  factors correspond to one of said stored impermissible N 1  and N 2  factors.   
     
     
       13. A method for generating an output signal of a selected frequency comprising the steps of: generating first and second reference signals of different frequency;   locking a first phase locked loop onto said first reference signal, said phase lock loop having a first adjustable frequency changing device for changing a loop frequency by a factor N 1  ;   locking a second phase locked loop onto said second reference signal, said second phase lock loop having a second adjustable frequency changing device for changing a loop frequency by a factor of N 2  ;   mixing signals from said first and second phase lock loops to control generation of an output signal at a frequency determined by said N 1  and N 2  factors;   presetting a control device with information for selecting N 1  and N 2  values to generate said output signal at selected desired frequencies, said information preventing selection of certain N 1  and N 2  values which could produce said selected desired frequencies but which would generate predetermined undesired frequencies within said loops;   selecting a desired frequency for said output signal;   operating said control device in response to a selected frequency to select N 1  and N 2  factors and apply them to said first and second frequency changing devices to produce said selected desired frequency in said output signal.   
     
     
       14. A method for generating an output signal of a selected frequency comprising the steps of: generating first and second reference signals of different frequency;   locking a first phase locked loop onto said first reference signal, said first phase lock loop having a first adjustable frequency changing device for changing a loop frequency by a factor N 1  ;   locking a second phase locked loop onto said second reference signal, said second phase lock loop having a second adjustable frequency changing device for changing a loop frequency by a factor N 2  ;   mixing signals from said first and second phase lock loops to control generation of an output signal at a frequency determined by said N 1  and N 2  factors;   presetting a microprocessor with a program for selecting N 1  and N 2  factors to generate said output signal at selected desired frequencies and for preventing selection of predetermined impermissible N 1  and N 2  factors which could produce said selected desired frequencies;   selecting a desired frequency for said output signal;   operating said microprocessor in response to a selected frequency in accordance with said program to select N 1  and N 2  factors and apply them to said first and second frequency changing devices to produce said selected desired frequency in said output signal by (a) calculating N 1  and N 2  values and (b) determining if one or both of said calculated N 1  and N 2  factors corresponds to predetermined impermissible N 1  and N 2  factors, if one or both of said calculated N 1  and N 2  factors correspond to predetermined impermissible N 1  and N 2  factors, (c) repeating operations (a) and (b) until calculated N 1  and N 2  factors do not correspond to said predetermined impermissible N 1  and N 2  factors and (d) applying calculated N 1  and N 2  factors which do not correspond to said predetermined impermissible N 1  and N 2  factors to said first and second frequency changing devices.