Automatic page selectors

Abstract

An automatic page selector comprises a counter, a page selector device responsive to the output of the counter to select pages for decoding and display, and a clock for providing pulses to the counter. Means may be provided for writing data into a memory the locations of which are sequentially addressable by the counter, and for controlling the intervals between successive clock pulses applied to the counter in accordance with the written data.

What is claimed is: 
     
       1. A page selector comprising a counter, a page selector device responsive to the output of the counter to select pages for decoding and display, a clock for providing pulses to the counter, a memory the locations of which are sequentially addressable by the counter, means for writing data into the memory, means for controlling the intervals between successive clock pulses applied to the counter in accordance with the written data, manual switches for addressing selected locations of the memory, means for writing information in the selected locations wherein the counter output is connected permanently to the memory and is connected to receive inputs from the manual switches, and wherein the counter comprises first, second and third counter elements and the manual switches comprise first and second switches connected respectively to the first and second counter elements and to separate inputs of a first diplexer, a second diplexer being connected to apply the output of a third switch or the output of the first diplexer to a magazine selector device, and a gate being connected to apply the clock pulses to the first counter element. 
     
     
       2. A page selector according to claim 1 comprising means for inhibiting the gate. 
     
     
       3. A page selector according to claim 2, wherein the gate inhibiting means comprises a bistable circuit which may be set by an output from the memory, indicative of an addressed memory location identifying a page which is to be selected. 
     
     
       4. A page selector according to claim 3, wherein the bistable circuit may be reset by an output from a further counter. 
     
     
       5. A page selector according to claim 3, comprising a latch circuit for setting the bistable circuit and resetting the first and second counter elements to zero.