Digital to analog converter with system gain insensitivity

Abstract

A position-measuring system in which an improved digital to analog converter accepts an error signal from a position measuring transducer, the error signal being processed to be a digital signal representation of the magnitude and two-state direction of a positional error. The system is constructed to operate as if the error signal input had three states, two directional states and an intermediate "dead zone."

What is claimed is: 
     
       1. A system including a position-measuring transducer which generates an error signal as a function of a positional state of said transducer and as a function of analog signals input to said transducer, said error signal having two directional states, the system comprising: a. input means for periodically sampling said error signal and for responsively generating digital signals representative of the directional state of said error signal;   b. converter means responsive to said digital signals for generating said analog signals, said analog signals being changed by a uniform given amount upon the occurrence of each of said digital signals; and   c. means responsive to said digital signals for changing said analog signals by a predetermined fixed amount greater than said uniform given amount whenever said error signal changes directional state.   
     
     
       2. A system according to claim 1 further comprising: means responsive to said digital signals for reducing the rate of sampling said error signal whenever said error signal has not remained in one directional state for two successive sampling times.   
     
     
       3. A system responsive to the relative space position of first and second relatively movable members of a position measuring transducer, said transducer producing an output error signal as a function of a relative space position of said members and as a function of analog signals input to said transducer, said error signal having two directional states, said system comprising: input circuitry adapted to receive said error signal and to responsively generate digital signals representative of the directional state of said error signal;   a source of clock pulses;   pulse deletion circuitry responsive to said clock pulses and to said digital signals to generate first and second stepping pulse trains, the difference in the number of pulses between said first and second stepping pulse trains being a function of the directional state of said error signal;   first and second counters, responsive to said first and second trains of stepping pulses, respectively, for counting and registering said stepping pulses cyclically through a count range, said first counter additionally having means for delaying count registering signals from said first counter for a predetermined delay time whenever said error signal is in a first of said two directional states; and   means for logically combining said count registering signals from said first counter with count registering signals from said second counter to form said analog signals.   
     
     
       4. In a position-measuring system digital to analog converter apparatus for supplying an analog signal representative of a given position to a position measurement transducer, said transducer responsively generating an error signal representative of the direction of the difference between said given position and an actual position of said transducer, the apparatus comprising: a. a source of clock pulses;   b. means responsive to said error signal for generating a source of digital pulses representative of the direction of said error signal;   c. circuit means responsive to said clock pulses and digital pulses for generating first and second trains of stepping pulses, the difference in the number of pulses between said first and second trains being a function of said error signal;   d. first and second counters responsive to said first and second trains of stepping pulses, respectively, for counting and registering said stepping pulses cyclically through a count range, said first counter additionally having means responsive to said digital pulses for delaying count registering signals from said first counter for a predetermined delay time when said error signal is in a given direction; and   e. means for logically combining said count registering signals from said first counter with count registering signals from said second counter to form said analog signal.   
     
     
       5. Apparatus according to claim 4 further comprising a reference counter responsive to said clock pulses for counting and registering said clock pulses. 
     
     
       6. Apparatus according to claim 5 further comprising: input circuitry responsive to said error signal and to periodic count registering signals from said reference counter for generating one of said digital input pulses whenever said error signal is in one direction for two consecutive periodic signals.   
     
     
       7. Apparatus according to claim 5 wherein said circuit means further comprises means for inhibiting the incrementing of said reference counter by a clock pulse upon the occurence of every other input pulse; and wherein said first train of pulses is composed of said clock pulses, one clock pulse being deleted from said first train upon the occurrence of an input pulse in a first of two states; and wherein said second train of pulses is composed of said clock pulses, one clock pulse being deleted from said second train upon the occurrence of an input pulse in a second of two states. 
     
     
       8. Apparatus according to claim 4 wherein said predetermined delay time is greater than one period of said clock pulses. 
     
     
       9. Apparatus according to claim 4 wherein said predetermined delay time is between one and two periods of said clock pulses. 
     
     
       10. In a position-measuring system digital to analog converter apparatus for supplying an analog signal representative of a given position to a position measurement transducer, said transducer responsively generating an error signal representative of the direction of the difference between said given position and an actual position of said transducer, the apparatus comprising: a. a source of clock pulses;   b. means responsive to said error signal for generating a source of digital pulses representative of the direction of said error signal;   c. circuit means responsive to said clock pulses and digital pulses for generating first and second trains of stepping pulses, the difference in the number of pulses between said first and second trains being a function of said error signal;   d. first and second counters responsive to said first and second trains of stepping pulses, respectively, for counting and registering said stepping pulses cyclically through a count range;   e. a reference counter responsive to said clock pulses for counting and registering said clock pulses;   f. circuit means for inhibiting the incrementing of said reference counter by a clock pulse upon the occurrence of every other input pulse; and   g. means for logically combining said count registering signals from said first counter with count registering signals from said second counter to form said analog signal; wherein said first train of pulses is composed of said clock pulses, one clock pulse being deleted from said first train upon the occurrence of an input pulse in a first of two states; and wherein said second train of pulses is composed of said clock pulses, one clock pulse being deleted from said second train upon the occurrence of an input pulse in a second of two states.     
     
     
       11. A system including a position-measuring transducer which generates an error signal as a function of analog signals transmitted to said transducer by converter circuitry responsive to said error signal, said error signal having two directional states, the system comprising: first means for periodically sampling said error signal at a sampling rate and for sensing the directional state of said error signal, said sampling rate being a first system parameter;   second means responsive to said first means and connected to said converter circuitry for changing said analog signals by a predetermined amount upon the sampling of said error signal, said predetermined amount being a second system parameter; and   third means responsive to said first means and connected to said first and second means for changing the value of at least one of said two system parameters upon a directional change of said error signal and for restoring said parameter to its initial value upon said error signal remaining in one directional state for a given number of consecutive samples.