Fabrication of a semiconductor device

Abstract

A semiconductor material of a first conductivity type has one of its surfaces subjected to high energy oxygen ion implantation, thereby forming an oxide layer below that surface. A gate is formed by masking at least a portion of the surface, exposing the unmasked portion to ion radiation so as to implant impurity ions in the region of the semiconductor material between its unmasked surface and the upper side of the subsurface oxide layer, and metallizing the surface above the implanted region. After removal of the masking material, source and drain areas are formed by high energy ion implantation in the semiconductor material adjacent the lower side of the subsurface oxide layer, the areas having a conductivity opposite the first conductivity type. After windows to the source and drain areas are opened in the semiconductor material and subsurface oxide layer, the exposed surfaces of these areas are metallized.

I claim: 
     
       1. An insulated gate, field effect transistor comprising a semiconductor body of a first conductivity type having a top and a bottom surface; a layer of an oxide of the semiconductor disposed intermediate the top and bottom surfaces of the semiconductor body; a source area and a drain area positioned in the semiconductor body adjacent the lower surface of the oxide layer and separated from one another by a region of the body between the top surface of the body and the upper surface of the oxide layer and a region of the body below the lower surface of the oxide layer, each area having a conductivity type opposite the first conductivity type; and a gate electrode positioned on the top surface of the region of the semiconductor body between the top surface of the body and the upper surface of the oxide layer, the region being in a degenerate state. 
     
     
       2. The transistor of claim 1 in which the semiconductor body is a P-type monocrystalline silicon; the source and drain areas have an N-type conductivity; and the region of the body on which the gate electrode is positioned contains implanted N-type impurity ions. 
     
     
       3. The transistor of claim 1 in which the oxide layer has a thickness in the range of about 1,000 to 2,000 A. and the oxide layer is disposed at about 0.5 to 1.0 micron below the surface of the body. 
     
     
       4. The transistor of claim 1 in which the semiconductor body is an N-type monocrystalline silicon; the source and drain areas have a P-type conductivity; and the region of the body on which the gate electrode is positioned contains implanted P-type impurity ions. 
     
     
       5. The transistor of claim 1 which comprises openings extending from the top surface of the semiconductor body through the oxide layer, thereby exposing at least a portion of the surfaces of the source and drain areas; and metal contacts attached to exposed surfaces of the source and drain areas.