Method for forming memory device

Abstract

A method includes forming a stack including a first sacrificial layer, a first supporting layer, a second sacrificial layer, and a second supporting layer over a substrate; forming first and second trenches; forming bottom electrodes in the first and second trenches; forming a patterned mask over the stack, in which the patterned mask has an opening exposing the stack; performing an etch process to the stack through the opening of the patterned mask, in which the etch process etches through a first portion of the stack to form a recess, while a second portion of the stack laterally between the first trench and the second trench is protected by a polymer generated during performing the etch process; removing the first and second sacrificial layers from the stack; forming capacitor dielectric layers over the bottom electrodes; and forming top electrodes over the capacitor dielectric layers.

What is claimed is: 
     
         1 . A method for forming a memory device, comprising: 
 forming a stack comprising a first sacrificial layer, a first supporting layer, a second sacrificial layer, and a second supporting layer over a substrate;   forming a first trench and a second trench in the stack;   forming bottom electrodes in the first trench and the second trench, respectively;   forming a patterned mask over the stack, wherein the patterned mask has an opening exposing the stack;   performing an etch process to the stack through the opening of the patterned mask, wherein the etch process etches through a first portion of the stack to form a recess, while a second portion of the stack laterally between the first trench and the second trench is protected by a polymer generated during performing the etch process;   removing the first sacrificial layer and the second sacrificial layer from the stack through the recess;    forming capacitor dielectric layers over the bottom electrodes, respectively; and   forming top electrodes over the capacitor dielectric layers, respectively.   
     
     
         2 . The method of claim 1 , wherein the polymer is formed on surfaces of the bottom electrodes during performing the etching process. 
     
     
         3 . The method of claim 1 ,wherein a portion of the second supporting layer of the second portion of the stack is etched during the etch process. 
     
     
         4 . The method of  claim 1 , further comprising:  
       removing the patterned mask after removing the first sacrificial layer and the second sacrificial layer; and 
       removing the polymer. 
     
     
         5 . The method of  claim 4 , wherein removing the polymer is performed after removing the patterned mask. 
     
     
         6 . The method of  claim 1 , the capacitor dielectric layers are formed over the second supporting layer and in the recess. 
     
     
         7 . The method of  claim 1 , further comprising forming an insulating layer over the top electrodes and filling the recess. 
     
     
         8 . The method of  claim 1 , further comprising forming a transistor in the substrate, wherein one of the bottom electrodes is electrically connected to the transistor. 
     
     
         9 . The method of  claim 1 , wherein the polymer extends from a first portion of the bottom electrodes within the first trench to a second portion of the bottom electrodes within the second trench. 
     
     
         10 . The method of  claim 1 , wherein forming the first trench and the second trench in the stack further comprises forming a third trench in the stack, a shortest distance between the first trench and the second trench is less than a shortest distance between the first trench and the third trench, and wherein the recess is formed laterally between the first trench and the third trench. 
     
     
         11 . A method for forming a memory device, comprising: forming a stack comprising a first sacrificial layer, a first supporting layer, a second sacrificial layer, and a second supporting layer over a substrate; 
       forming a first trench, a second trench, and a third trench in the stack, wherein a distance between the first trench and the second trench is less than a distance between the first trench and the third trench;  
       forming bottom electrodes in the first, second, and third trenches, respectively;  
       forming a patterned mask over the stack, wherein the patterned mask has an opening exposing the stack; 
       performing an etch process to the stack through the opening of the patterned mask to form a recess in the stack, wherein after the etch process is complete, a first portion of the second supporting layer laterally between the first trench and the second trench remains, while a second portion of the second supporting layer 
       laterally between the first trench and the third trench is removed; 
       removing the first sacrificial layer and the second sacrificial layer from the stack through the recess; 
       forming capacitor dielectric layers over the bottom electrodes, respectively; and  
       forming top electrodes over the capacitor dielectric layers, respectively. 
     
     
         12 . The method of  claim 11 , wherein performing the etch process further comprises forming a polymer over the first portion of the second supporting layer. 
     
     
         13 . The method of  claim 12 , wherein the polymer further extend to portions of the bottom electrodes within the first trench and the second trench. 
     
     
         14 . The method of  claim 13 , wherein the polymer wraps top ends of the bottom electrodes within the first trench and the second trench. 
     
     
         15 . The method of  claim 12 , further comprising:  
       removing the patterned mask after removing the first sacrificial layer and the second sacrificial layer; and 
       removing the polymer after removing the patterned mask.  
     
     
         16 . The method of claim 15 , wherein removing the polymer further comprises removing the first portion of the second supporting layer. 
     
     
         17 . The method of  claim 11 , wherein after the etch process is complete, a top surface of the first portion of the second supporting layer is lower than top ends of the bottom electrodes. 
     
     
         18 . The method of  claim 11 , wherein the etch process is performed such that a thickness of the first portion of the second supporting layer is reduced. 
     
     
         19 . The method of  claim 11 , further comprising forming a transistor in the substrate, wherein one of the bottom electrodes is electrically connected to a source/drain region of the transistor. 
     
     
         20 . The method of  claim 11 , wherein the etch process is performed such that portions of the first sacrificial layer, the first supporting layer, and the second sacrificial layer under the second portion of the second supporting layer are removed.