US2026074687A1PendingUtilityA1

Methods and systems for reducing noise during switch state transitions

Assignee: MURATA MANUFACTURING COPriority: Sep 9, 2024Filed: Sep 9, 2024Published: Mar 12, 2026
Est. expirySep 9, 2044(~18.1 yrs left)· nominal 20-yr term from priority
Inventors:HASH BRYAN LEE
H04B 1/40H03K 17/163H03K 17/162H03K 17/16H03K 17/693
40
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Claims

Abstract

Techniques are provided for reducing cross-coupled noise. For example, a method includes coupling an input node to a ground by a primary shunt switch in a closed state, decoupling an output node from the input node by a primary through switch in an open state, switching the primary shunt switch from the closed state to an open state to decouple the input node from the ground, switching the primary through switch from the open state to a closed state to couple the output node to the input node and provide a circuit path for an RF signal from an RF source to a load, and switching an ancillary switch from an open state to a closed state to couple the ancillary switch across one of the primary switches to reduce cross-coupled noise. Additional systems, devices, circuits, and methods are also provided.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method comprising:
 coupling an input node to a ground by a primary shunt switch in a closed state, wherein the input node is configured to receive an RF signal from an RF source;   decoupling an output node from the input node by a primary through switch in an open state, wherein the output node is configured to pass the RF signal to a load;   switching the primary shunt switch from the closed state to an open state to decouple the input node from the ground;   switching the primary through switch from the open state to a closed state to couple the output node to the input node and provide a circuit path for the RF signal from the RF source to the load; and   switching an ancillary switch from an open state to a closed state to couple the ancillary switch across one of the primary switches to reduce cross-coupled noise induced by the switching of the one of the primary switches before the RF signal is received by the input node.   
     
     
         2 . The method of  claim 1 , further comprising:
 switching the ancillary switch from the closed state to the open state to decouple the ancillary switch from the one of the primary switches; and   passing the RF signal from the RF source to the load.   
     
     
         3 . The method of  claim 2 , further comprising:
 additionally switching the primary through switch from the closed state to the open state to decouple the output node from the input node; and   additionally switching the primary shunt switch from the open state to the closed state to couple the input node to the ground; and   switching the ancillary switch from the open state to the closed state to couple the ancillary switch across the one of the primary switches to reduce cross-coupled noise induced by the additional switching of the one of the primary switches.   
     
     
         4 . The method of  claim 1 , wherein the ancillary switch exhibits a reduced size relative to the one of the primary switches and generates less noise than the one of the primary switches when switching. 
     
     
         5 . The method of  claim 1 , further comprising at least partially dissipating the cross-coupled noise by a resistive load connected in series with the ancillary switch across the one of the primary switches while the ancillary switch is in the closed state. 
     
     
         6 . The method of  claim 1 , further comprising reducing, by the ancillary switch, a change in impedance exhibited at the input node and/or the output node induced by the switching of the one of the primary switches. 
     
     
         7 . The method of  claim 1 , wherein:
 the ancillary switch is an ancillary shunt switch connected across the primary shunt switch;   the switching of the ancillary shunt switch is performed before the switching of the primary shunt switch; and   the ancillary shunt switch reduces a change in impedance exhibited at the input node induced by the switching of the primary shunt switch.   
     
     
         8 . The method of  claim 7 , further comprising:
 switching an ancillary through switch from an open state to a closed state to couple the ancillary through switch across the primary through switch to reduce cross-coupled noise induced by the switching of the primary through switch;   wherein the switching of the ancillary through switch is performed before the switching of the primary through switch; and   wherein the ancillary through switch reduces a change in impedance exhibited at the output node induced by the switching of the primary through switch.   
     
     
         9 . The method of  claim 1 , wherein:
 the ancillary switch is an ancillary through switch connected across the primary through switch;   the switching of the ancillary through switch is performed before the switching of the primary through switch; and   the ancillary through switch reduces a change in impedance exhibited at the output node induced by the switching of the primary through switch.   
     
     
         10 . The method of  claim 9 , wherein:
 the ancillary through switch is a first ancillary through switch, the load is a first load, the output node is a first output node, and the circuit path is a first circuit path;   the method further comprises:
 switching a second primary through switch from an open state to a closed state to couple a second output node to the input node and provide a second circuit path for the RF signal from the RF source to a second load, and 
 switching a second ancillary through switch from an open state to a closed state to couple the second ancillary through switch across the second primary through switch to reduce cross-coupled noise induced by the switching of the second primary through switch; 
   the switching of the second ancillary through switch is performed before the switching of the second primary through switch; and   the second ancillary through switch reduces a change in impedance exhibited at the second output node induced by the switching of the second primary through switch.   
     
     
         11 . The method of  claim 10 , further comprising:
 switching an ancillary shunt switch from an open state to a closed state to couple the ancillary shunt switch across the primary shunt switch to reduce cross-coupled noise induced by the switching of the primary shunt switch;   wherein the switching of the ancillary shunt switch is performed before the switching of the primary shunt switch; and   wherein the ancillary shunt switch reduces a change in impedance exhibited at the input node induced by the switching of the primary shunt switch.   
     
     
         12 . The method of  claim 1 , further comprising:
 receiving, by a resistor network, one or more primary control signals;   providing, by the resistor network, a plurality of delayed control signals to cause the primary shunt switch, the primary through switch, and the ancillary switch to operate with staggered delays in relation to each other in response thereto, the providing comprising:
 providing, by a first resistor of the resistor network, a first one of the delayed control signals, 
 providing, by a second resistor of the resistor network, a second one of the delayed control signals, and 
 providing, by a third resistor of the resistor network, a third one of the delayed control signals; 
   transitioning the primary shunt switch in response to the first delayed control signal after a first delay relative to the one or more control signals, wherein the first delay is determined by at least the first resistor and a first capacitance of the primary shunt switch;   transitioning the primary through switch in response to the second delayed control signal after a second delay relative to the one or more control signals, wherein the second delay is determined by at least the second resistor and a second capacitance of the primary through switch; and   transitioning the ancillary switch in response to the third delayed control signal after a third delay relative to the one or more control signals, wherein the third delay is determined by at least the third resistor and a third capacitance of the ancillary switch.   
     
     
         13 . A switching circuit comprising:
 an input node configured to receive an RF signal from an RF source;   an output node configured to pass the RF signal to a load;   a primary shunt switch configured to selectively shunt the input node to a ground;   a primary through switch configured to selectively couple the input node to the output node to provide a circuit path for the RF signal from the RF source to the load; and   an ancillary switch configured to be selectively coupled across the one of the primary switches to reduce cross-coupled noise induced by a switching of the one of the primary switches before the RF signal is received by the input node.   
     
     
         14 . The switching circuit of  claim 13 , wherein the ancillary switch exhibits a reduced size relative to the one of the primary switches and generates less noise than the one of the primary switches when switching. 
     
     
         15 . The switching circuit of  claim 13 , further comprising:
 a resistive load connected in series with the ancillary switch across the one of the primary switches; and   wherein the resistive load is configured to at least partially dissipate the cross-coupled noise.   
     
     
         16 . The switching circuit of  claim 13 , wherein the ancillary switch reduces a change in impedance exhibited at the input node and/or the output node induced by the switching of the one of the primary switches. 
     
     
         17 . The switching circuit of  claim 13 , wherein:
 the ancillary switch is an ancillary shunt switch configured to be selectively coupled across the primary shunt switch;   the ancillary shunt switch is configured to operate before the primary shunt switch; and   the ancillary shunt switch reduces a change in impedance exhibited at the input node induced by an operation of the primary shunt switch.   
     
     
         18 . The switching circuit of  claim 17 , further comprising:
 an ancillary through switch configured to be selectively coupled across the primary through switch; and   wherein the ancillary through switch reduces a change in impedance exhibited at the output node induced by an operation of the primary through switch.   
     
     
         19 . The switching circuit of  claim 13 , wherein:
 the ancillary switch is an ancillary through switch configured to be selectively coupled across the primary through switch; and   the ancillary through switch reduces a change in impedance exhibited at the output node induced by the switching of the primary through switch.   
     
     
         20 . The switching circuit of  claim 19 , wherein:
 the ancillary through switch is a first ancillary through switch, the load is a first load, the output node is a first output node, and the circuit path is a first circuit path, the switching circuit further comprising:
 a second output node configured to pass the RF signal to a second load, 
 a second primary through switch configured to selectively couple the input node to the second output node and provide a second circuit path for the RF signal from the RF source to the second load, and 
 a second ancillary through switch configured to be selectively coupled across the second primary through switch; and 
   the second ancillary through switch reduces a change in impedance exhibited at the second output node induced by a switching of the second primary through switch.   
     
     
         21 . The switching circuit of  claim 20 , further comprising:
 an ancillary shunt switch configured to be selectively coupled across the primary shunt switch; and   wherein the ancillary shunt switch reduces a change in impedance exhibited at the input node induced by a switching of the primary shunt switch.   
     
     
         22 . A system comprising the switching circuit of  claim 13 , the system further comprising:
 a resistor network configured to receive one or more primary control signals and provide a plurality of delayed control signals to cause the primary shunt switch, the primary through switch, and the ancillary switch to operate with staggered delays in relation to each other in response thereto, the resistor network comprising:
 a first resistor configured to provide a first one of the delayed control signals, 
 a second resistor configured to provide a second one of the delayed control signals, and 
 a third resistor configured to provide a third one of the delayed control signals; 
   wherein the primary shunt switch is configured to transition in response to the first delayed control signal after a first delay relative to the one or more control signals, wherein the first delay is determined by at least the first resistor and a first capacitance of the primary shunt switch;   wherein the primary through switch is configured to transition in response to the second delayed control signal after a second delay relative to the one or more control signals, wherein the second delay is determined by at least the second resistor and a second capacitance of the primary through switch; and   wherein the ancillary switch is configured to transition in response to the third delayed control signal after a third delay relative to the one or more control signals, wherein the third delay is determined by at least the third resistor and a third capacitance of the ancillary switch.   
     
     
         23 . A method comprising:
 receiving, by a resistor network, one or more primary control signals;   providing, by the resistor network, a plurality of delayed control signals to cause a plurality of switches to operate with staggered delays in relation to each other in response thereto, the providing comprising:
 providing, by a first resistor of the resistor network, a first one of the delayed control signals, and 
 providing, by a second resistor of the resistor network, a second one of the delayed control signals; 
   transitioning a first one of the switches in response to the first delayed control signal after a first delay relative to the one or more control signals, wherein the first delay is determined by at least the first resistor and a first capacitance of the first switch; and   transitioning a second one of the switches in response to the second delayed control signal after a second delay relative to the one or more control signals, wherein the second delay is determined by at least the second resistor and a second capacitance of the second switch.   
     
     
         24 . The method of  claim 23 , wherein:
 the first resistor provides the first delayed control signal in response to a first one of the primary control signals;   the second resistor is connected between the first switch and the second switch;   the second resistor provides the second delayed control signal in response to the first delayed control signal; and   the second delay is further determined by at least the first resistor.   
     
     
         25 . The method of  claim 23 , further comprising:
 providing, by a third resistor of the resistor network, a third one of the delayed control signals;   transitioning a third one of the switches in response to the third delayed control signal after a third delay relative to the one or more control signals, wherein the third delay is determined by at least the third resistor and a third capacitance of the third switch; and   wherein the first, the second, and the third resistors provide the first, the second, and the third delayed control signals, respectively, in response to a first one of the primary control signals.   
     
     
         26 . The method of  claim 23 , further comprising:
 providing, by a third resistor of the resistor network, a third one of the delayed control signals;   transitioning a third one of the switches in response to the third delayed control signal after a third delay relative to the one or more control signals, wherein the third delay is determined by at least the third resistor and a third capacitance of the third switch; and   transitioning a fourth one of the switches in response to the third delayed control signal.   
     
     
         27 . The method of  claim 23 , further comprising:
 providing, by a third resistor of the resistor network, a third one of the delayed control signals;   transitioning a third one of the switches in response to the third delayed control signal after a third delay relative to the one or more control signals, wherein the third delay is determined by at least the third resistor and a third capacitance of the third switch;   wherein the first switch implements a first ancillary switch;   wherein the second switch implements a primary switch;   wherein the third switch implements a second ancillary switch;   wherein the first delayed control signal is configured to cause the first ancillary switch to transition to a closed state before the primary switch transitions to a closed state and before the second ancillary switch transitions to a closed state to reduce noise associated the transition of the primary switch to the closed state; and   wherein the third delayed control signal is configured to cause the second ancillary switch to transition to an open state after the primary switch transitions to an open state and after the second ancillary switch transitions to an open state to reduce noise associated the transition of the primary switch to the open state.   
     
     
         28 . The method of  claim 23 , further comprising:
 providing, by a third resistor of the resistor network, a third one of the delayed control signals;   transitioning a third one of the switches in response to the third delayed control signal after a third delay relative to the one or more control signals, wherein the third delay is determined by at least the third resistor and a third capacitance of the third switch;   wherein the first resistor provides the first delayed control signal in response to a first one of the primary control signals;   wherein the first delay is further determined by at least a timing of the first primary control signal;   wherein the second resistor provides the second delayed control signal in response to a second one of the primary control signals;   wherein the second delay is further determined by at least a timing of the second primary control signal;   wherein the third resistor provides the third delayed control signal in response to a third one of the primary control signals; and   wherein the third delay is further determined by at least a timing of the third primary control signal.   
     
     
         29 . A system comprising:
 a resistor network configured to receive one or more primary control signals and provide a plurality of delayed control signals to cause a plurality of switches to operate with staggered delays in relation to each other in response thereto, the resistor network comprising:
 a first resistor configured to provide a first one of the delayed control signals, and 
 a second resistor configured to provide a second one of the delayed control signals; 
   a first one of the switches configured to transition in response to the first delayed control signal after a first delay relative to the one or more control signals, wherein the first delay is determined by at least the first resistor and a first capacitance of the first switch; and   a second one of the switches configured to transition in response to the second delayed control signal after a second delay relative to the one or more control signals, wherein the second delay is determined by at least the second resistor and a second capacitance of the second switch.   
     
     
         30 . The system of  claim 29 , wherein:
 the first resistor is configured to provide the first delayed control signal in response to a first one of the primary control signals;   the second resistor is connected between the first switch and the second switch;   the second resistor is configured to provide the second delayed control signal in response to the first delayed control signal; and   the second delay is further determined by at least the first resistor.   
     
     
         31 . The system of  claim 29 , wherein:
 the resistor network further comprises a third resistor configured to provide a third one of the delayed control signals;   the system further comprises a third one of the switches configured to receive the third delayed control signal and transition in response thereto after a third delay relative to the one or more control signals, wherein the third delay is determined by at least the third resistor and a third capacitance of the third switch; and   wherein the first, the second, and the third resistors provide the first, the second, and the third delayed control signals, respectively, in response to a first one of the primary control signals.   
     
     
         32 . The system of  claim 29 , wherein:
 the resistor network further comprises a third resistor configured to provide a third one of the delayed control signals;   the system further comprises a third one of the switches configured to receive the third delayed control signal and transition in response thereto after a third delay relative to the one or more control signals, wherein the third delay is determined by at least the third resistor and a third capacitance of the third switch; and   the system further comprises a fourth one of the switches configured to receive the third delayed control signal and transition in response thereto.   
     
     
         33 . The system of  claim 29 , wherein:
 the resistor network further comprises a third resistor configured to provide a third one of the delayed control signals;   the system further comprises a third one of the switches configured to receive the third delayed control signal and transition in response thereto after a third delay relative to the one or more control signals, wherein the third delay is determined by at least the third resistor and a third capacitance of the third switch;   the first switch implements a first ancillary switch;   the second switch implements a primary switch;   the third switch implements a second ancillary switch;   the first delayed control signal is configured to cause the first ancillary switch to transition to a closed state before the primary switch transitions to a closed state and before the second ancillary switch transitions to a closed state to reduce noise associated the transition of the primary switch to the closed state; and   the third delayed control signal is configured to cause the second ancillary switch to transition to an open state after the primary switch transitions to an open state and after the second ancillary switch transitions to an open state to reduce noise associated the transition of the primary switch to the open state.   
     
     
         34 . The system of  claim 29 , wherein:
 the resistor network further comprises a third resistor configured to provide a third one of the delayed control signals;   the system further comprises a third one of the switches configured to receive the third delayed control signal and transition in response thereto after a third delay relative to the one or more control signals, wherein the third delay is determined by at least the third resistor and a third capacitance of the third switch;   the first resistor is configured to provide the first delayed control signal in response to a first one of the primary control signals;   the first delay is further determined by at least a timing of the first primary control signal;   the second resistor is configured to provide the second delayed control signal in response to a second one of the primary control signals;   the second delay is further determined by at least a timing of the second primary control signal;   the third resistor is configured to provide the third delayed control signal in response to a third one of the primary control signals; and   the third delay is further determined by at least a timing of the third primary control signal.

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