US2026064528A1PendingUtilityA1

Detecting die failure in memory sub-systems

Assignee: MICRON TECHNOLOGY INCPriority: Sep 3, 2024Filed: Sep 3, 2024Published: Mar 5, 2026
Est. expirySep 3, 2044(~18.1 yrs left)· nominal 20-yr term from priority
G06F 11/076G06F 11/1016G06F 11/1068
52
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A plurality of commands comprising data to be written to a plurality of blockstripes, each blockstripe comprising at least one block from each of a plurality of memory devices, can be received from a high-speed processing device. Based on determining a first memory device associated with a first blockstripe experiences program failure in response to execution of a first command, whether a second memory device associated with a second blockstripe experiences program failure in response to execution of a second command, can be determined. Based on detecting consecutive program failure on the memory device, whether a program failure count associated with the memory device satisfies a program failure threshold can be determined. Based on determining the program failure count associated with the memory device satisfies the program failure threshold, retirement of the memory device can be initiated.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A system comprising:
 a plurality of memory devices;   a plurality of high-speed processing devices; and   a plurality of channel cores operatively coupled to the plurality of memory devices and configured to perform operations comprising:
 receiving, from a high-speed processing device of the plurality of high-speed processing devices, a plurality of commands comprising data to be written to a plurality of blockstripes, each blockstripe comprising at least one block from each of the plurality of memory devices; 
 in response to determining that one or more blocks of a first blockstripe on a memory device of the plurality of memory devices experience program failure in response to execution of a first command of the plurality of commands, determining whether one or more blocks of a second blockstripe on the memory device experience program failure in response to execution of a second command, wherein the first blockstripe and the second blockstripe are consecutive blockstripes on the memory device; 
 in response to detecting consecutive program failure on the memory device, determining whether a program failure count associated with the memory device satisfies a program failure threshold; and 
 in response to determining that the program failure count associated with the memory device satisfies the program failure threshold, initiating retirement of the memory device. 
   
     
     
         2 . The system of  claim 1 , wherein the plurality of channel cores is further configured to perform operations comprising:
 incrementing the program failure count associated with the memory device based on determining that a block of a blockstripe on the memory device experiences program failure.   
     
     
         3 . The system of  claim 1 , wherein the plurality of channel cores is further configured to perform operations comprising:
 determining whether a first memory device associated with the first blockstripe that experiences program failure and a second memory device associated with the second blockstripe that experiences program failure are the same memory device.   
     
     
         4 . The system of  claim 3 , wherein the plurality of channel cores is further configured to perform operations comprising:
 based on determining that the first memory device associated with the first blockstripe that experiences program failure and the second memory device associated with the second blockstripe that experiences program failure are the same memory device, determining that the memory device experiences consecutive program failure during programming of the first blockstripe and the second blockstripe.   
     
     
         5 . The system of  claim 1 , wherein the plurality of channel cores is further configured to perform operations comprising:
 based on determining that the second blockstripe is programmed without program failure, resetting the program failure count associated with the memory device.   
     
     
         6 . The system of  claim 1 , wherein the plurality of channel cores is further configured to perform operations comprising:
 determining that the program failure count associated with the memory device satisfies the program failure threshold when the program failure count associated with the memory device is greater than or equal to the program failure threshold.   
     
     
         7 . The system of  claim 1 , wherein a channel comprises one or more memory devices of the plurality of memory devices, and wherein the channel is associated with a channel core of the plurality of channel cores. 
     
     
         8 . A method comprising:
 receiving, from a high-speed processing device of a plurality of high-speed processing devices coupled to a plurality of memory devices, a plurality of commands comprising data to be written to a plurality of blockstripes, each blockstripe comprising at least one block from each of the plurality of memory devices;   in response to determining that one or more blocks of a first blockstripe on a memory device of the plurality of memory devices experience program failure in response to execution of a first command of the plurality of commands, determining whether one or more blocks of a second blockstripe on the memory device experience program failure in response to execution of a second command, wherein the first blockstripe and the second blockstripe are consecutive blockstripes on the memory device;   in response to detecting consecutive program failure on the memory device, determining whether a program failure count associated with the memory device satisfies a program failure threshold; and   in response to determining that the program failure count associated with the memory device satisfies the program failure threshold, initiating retirement of the memory device.   
     
     
         9 . The method of  claim 8 , further comprising incrementing the program failure count associated with the memory device based on determining that a block of a blockstripe on the memory device experiences program failure. 
     
     
         10 . The method of  claim 8 , further comprising determining whether a first memory device associated with the first blockstripe that experiences program failure and a second memory device associated with the second blockstripe that experiences program failure are the same memory device. 
     
     
         11 . The method of  claim 10 , further comprising, based on determining that the first memory device associated with the first blockstripe that experiences program failure and the second memory device associated with the second blockstripe that experiences program failure are the same memory device, determining that the memory device experiences consecutive program failure during programming of the first blockstripe and the second blockstripe. 
     
     
         12 . The method of  claim 8 , further comprising, based on determining that the second blockstripe is programmed without program failure, resetting the program failure count associated with the memory device. 
     
     
         13 . The method of  claim 8 , further comprising determining that the program failure count associated with the memory device satisfies the program failure threshold when the program failure count associated with the memory device is greater than or equal to the program failure threshold. 
     
     
         14 . A non-transitory computer readable storage medium comprising instructions that, when executed by a plurality of channel cores, cause the plurality of channel cores to perform operations comprising:
 receiving, from a high-speed processing device of a plurality of high-speed processing devices coupled to a plurality of memory devices, a plurality of commands comprising data to be written to a plurality of blockstripes, each blockstripe comprising at least one block from each of the plurality of memory devices;   in response to determining that one or more blocks of a first blockstripe on a memory device of the plurality of memory devices experience program failure in response to execution of a first command of the plurality of commands, determining whether one or more blocks of a second blockstripe on the memory device experience program failure in response to execution of a second command, wherein the first blockstripe and the second blockstripe are consecutive blockstripes on the memory device;   in response to detecting consecutive program failure on the memory device, determining whether a program failure count associated with the memory device satisfies a program failure threshold; and   in response to determining that the program failure count associated with the memory device satisfies the program failure threshold, initiating retirement of the memory device.   
     
     
         15 . The non-transitory computer readable storage medium of  claim 14 , wherein the plurality of channel cores is further configured to perform operations comprising:
 incrementing the program failure count associated with the memory device based on determining that a block of a blockstripe on the memory device experiences program failure.   
     
     
         16 . The non-transitory computer readable storage medium of  claim 14 , wherein the plurality of channel cores is further configured to perform operations comprising:
 determining whether a first memory device associated with the first blockstripe that experiences program failure and a second memory device associated with the second blockstripe that experiences program failure are the same memory device.   
     
     
         17 . The non-transitory computer readable storage medium of  claim 16 , wherein the plurality of channel cores is further configured to perform operations comprising:
 based on determining that the first memory device associated with the first blockstripe that experiences program failure and the second memory device associated with the second blockstripe that experiences program failure are the same memory device, determining that the memory device experiences consecutive program failure during programming of the first blockstripe and the second blockstripe.   
     
     
         18 . The non-transitory computer readable storage medium of  claim 14 , wherein the plurality of channel cores is further configured to perform operations comprising:
 based on determining that the second blockstripe is programmed without program failure, resetting the program failure count associated with the memory device.   
     
     
         19 . The non-transitory computer readable storage medium of  claim 14 , wherein the plurality of channel cores is further configured to perform operations comprising:
 determining that the program failure count associated with the memory device satisfies the program failure threshold when the program failure count associated with the memory device is greater than or equal to the program failure threshold.   
     
     
         20 . The non-transitory computer readable storage medium of  claim 14 , wherein a channel comprises one or more memory devices of the plurality of memory devices, and wherein the channel is associated with a channel core of the plurality of channel cores.

Join the waitlist — get patent alerts

Track US2026064528A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.