Electronic package and manufacturing method thereof
Abstract
Provided are an electronic package and a manufacturing method thereof, including a plurality of solder bumps formed on a carrier structure having an electronic component disposed thereon, a plurality of conductive pillars disposed on the solder bumps, an encapsulating layer covering the electronic component, the solder bumps and the conductive pillars, a wiring structure formed on the encapsulating layer. The solder bumps are connected to the carrier structure, and the conductive pillars are connected to the wiring structure. Hence, the carrier structure and the wiring structure are connected to each other by the solder bumps and the conductive pillars, thereby the problem of bridging short circuit between the solder bumps can be avoided.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . An electronic package, comprising:
a carrier structure having a circuit layer and defined with a first side and a second side opposite to the first side; a plurality of solder bumps disposed on the first side of the carrier structure and electrically connected to the circuit layer; a plurality of conductive pillars disposed on the solder bumps; an electronic component disposed on the first side of the carrier structure and electrically connected to the circuit layer; an encapsulating layer formed on the first side of the carrier structure and encapsulating the solder bumps, the conductive pillars and the electronic component; and a wiring structure formed on the encapsulating layer and having a wiring layer electrically connected to the electronic component and the conductive pillars.
2 . The electronic package of claim 1 , wherein the conductive pillars are metal pillars.
3 . The electronic package of claim 1 , wherein a plurality of conductive components are disposed on the wiring structure.
4 . The electronic package of claim 1 , wherein a functional component is disposed on the wiring structure.
5 . The electronic package of claim 1 , wherein a plurality of the electronic component are embedded in the encapsulating layer.
6 . The electronic package of claim 1 , wherein an electronic device electrically connected to the circuit layer is disposed on the second side of the carrier structure.
7 . The electronic package of claim 6 , wherein the electronic device is a semiconductor chip and a packaging module.
8 . The electronic package of claim 1 , further comprising a packaging layer covering the carrier structure and the encapsulating layer.
9 . The electronic package of claim 8 , wherein the wiring structure is further formed on the packaging layer.
10 . The electronic package of claim 1 , wherein a width of the carrier structure is smaller than a width of the wiring structure.
11 . A method of manufacturing an electronic package, the method comprising:
providing a carrier structure having a circuit layer and defined with a first side and a second side opposite to the first side; forming a plurality of solder bumps on the first side of the carrier structure, and electrically connecting the solder bumps to the circuit layer; forming a plurality of conductive pillars on the solder bumps; disposing an electronic component on the first side of the carrier structure, and electrically connecting the electronic component to the circuit layer; forming an encapsulating layer on the first side of the carrier structure for encapsulating the solder bumps, the conductive pillars and the electronic component; and forming a wiring structure on the encapsulating layer, wherein the wiring structure is a wiring layer electrically connected to the electronic component and the conductive pillars.
12 . The method of claim 11 , wherein the conductive pillars are metal pillars.
13 . The method of claim 11 , wherein a plurality of conductive components are disposed on the wiring structure.
14 . The method of claim 11 , wherein a functional component is disposed on the wiring structure.
15 . The method of claim 11 , wherein a plurality of the electronic component are embedded in the encapsulating layer.
16 . The method of claim 11 , wherein an electronic device electrically connected to the circuit layer is disposed on the second side of the carrier structure.
17 . The method of claim 16 , wherein the electronic device is a semiconductor chip and a packaging module.
18 . The method of claim 11 , further comprising forming a packaging layer to cover the carrier structure and the encapsulating layer.
19 . The method of claim 18 , wherein the wiring structure is further formed on the packaging layer.
20 . The method of claim 11 , wherein a width of the carrier structure is smaller than a width of the wiring structure.Join the waitlist — get patent alerts
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