Display panel and display apparatus

Abstract

A display panel and a display apparatus are provided. In the display panel, a first electrode of the threshold compensation transistor is connected to a first electrode of the driving transistor, a second electrode of the threshold compensation transistor is connected to a gate electrode of the driving transistor, and the data writing transistor is connected to a second electrode of the driving transistor, a material of an active layer of the threshold compensation transistor includes low-temperature poly-silicon, the gate line and the scan line are arranged along a second direction, the second direction intersects with the first direction, the gate line is different from the scan line, an active layer of the data writing transistor is located on a side of an active layer of the driving transistor away from the active layer of the threshold compensation transistor in the second direction.

1 . A display panel, comprising:
 a base substrate;   a pixel circuit, located on the base substrate, and comprising a driving transistor, a threshold compensation transistor and a data writing transistor;   a gate line, connected to a gate electrode of the threshold compensation transistor, and extending along a first direction; and   a scan line connected to a gate electrode of the data writing transistor, and extending along the first direction,   wherein a first electrode of the threshold compensation transistor is connected to a first electrode of the driving transistor, a second electrode of the threshold compensation transistor is connected to a gate electrode of the driving transistor, and the data writing transistor is connected to a second electrode of the driving transistor,   a material of an active layer of the threshold compensation transistor comprises low-temperature poly-silicon,   the gate line and the scan line are arranged along a second direction, the second direction intersects with the first direction, the gate line is different from the scan line,   an active layer of the data writing transistor is located on a side of an active layer of the driving transistor away from the active layer of the threshold compensation transistor in the second direction.   
     
     
         2 . The display panel according to  claim 1 , wherein the gate line and the scan line are disposed on both sides of the active layer of the driving transistor, respectively. 
     
     
         3 . The display panel according to  claim 1 , further comprising a light-emitting element, wherein the pixel circuit is configured to drive the light-emitting element,
 the pixel circuit further comprises a first reset transistor connected to the gate electrode of the driving transistor;   the light-emitting element comprises a first electrode, a second electrode, and a light-emitting functional layer located between the first electrode and the second electrode, and the first electrode of the light-emitting element is closer to the base substrate than the second electrode of the light-emitting element.   
     
     
         4 . The display panel according to  claim 3 , wherein an orthographic projection of the first electrode of the light-emitting element on the base substrate overlaps with an orthographic projection of an active layer of the first reset transistor on the base substrate, and the orthographic projection of the first electrode of the light-emitting element on the base substrate overlaps with an orthographic projection of the active layer of the threshold compensation transistor on the base substrate. 
     
     
         5 . (canceled) 
     
     
         6 . The display panel according to  claim 3 , wherein an active layer of the first reset transistor comprises a first channel and a second channel, the first channel and the second channel are connected through a first conductive portion, the active layer of the threshold compensation transistor comprises a third channel and a fourth channel, and the third channel and the fourth channel are connected through a second conductive portion,
 wherein the orthographic projection of the first electrode of the light-emitting element on the base substrate covers an orthographic projection of at least one of the first conductive portion and the second conductive portion on the base substrate.   
     
     
         7 . (canceled) 
     
     
         8 . The display panel according to  claim 6 , wherein the orthographic projection of the first electrode of the light-emitting element on the base substrate overlaps with an orthographic projection of the first conductive portion on the base substrate, and the orthographic projection of the first electrode of the light-emitting element on the base substrate overlaps with an orthographic projection of the second conductive portion on the base substrate. 
     
     
         9 . The display panel according to  claim 4 , further comprising a light-emitting control signal line, wherein the pixel circuit further comprises a first light-emitting control transistor, an orthographic projection of the light-emitting control signal line on the base substrate overlaps with an orthographic projection of an active layer of the first light-emitting control transistor on the base substrate, the first light-emitting control transistor and the data writing transistor are connected through a first conductive connection component, and an orthographic projection of the light-emitting control signal line on the base substrate overlaps with an orthographic projection of the first conductive connection component on the base substrate. 
     
     
         10 . The display panel according to  claim 9 , wherein the first conductive connection component and the active layer of the first light-emitting control transistor are located in different layers,
 wherein one end of the first conductive connection component is connected to the data writing transistor through a first via hole, and the other end of the first conductive connection component is connected to the first light-emitting control transistor through a second via hole,   wherein the first via hole is located between the light-emitting control signal line and the scan line.   
     
     
         11 - 12 . (canceled) 
     
     
         13 . The display panel according to  claim 9 , wherein the orthographic projection of the light-emitting control signal line on the base substrate does not overlap with an orthographic projection of the data writing transistor on the base substrate. 
     
     
         14 . The display panel according to  claim 4 , further comprising a storage capacitor and a first power line, wherein a first electrode plate of the storage capacitor is connected to the gate electrode of the driving transistor, a second electrode plate of the storage capacitor is connected to the first power line, and the first power line is configured to provide a first power voltage to the pixel circuit. 
     
     
         15 . The display panel according to  claim 14 , wherein an orthographic projection of the first power line on the base substrate overlaps with the orthographic projection of the active layer of the first reset transistor on the base substrate, and overlaps with the orthographic projection of the active layer of the threshold compensation transistor on the base substrate. 
     
     
         16 . The display panel according to  claim 14 , wherein the first power line comprises a first conductive line and a second conductive line, the first conductive line is closer to the base substrate than the second conductive line, and the first conductive line is connected to the second conductive line. 
     
     
         17 . The display panel according to  claim 16 , wherein the second conductive line comprises a first protrusion protruding along the first direction, and an orthographic projection of the first protrusion on the base substrate overlaps with an orthographic projection of at least one of a first channel and a second channel of the active layer of the first reset transistor on the base substrate,
 wherein a plurality of first conductive lines are arranged along the first direction, and at least one first conductive line comprises a plurality of sub-lines disconnected along the second direction, and the second direction intersects with the first direction.   
     
     
         18 . (canceled) 
     
     
         19 . The display panel according to  claim 16 , further comprising a first initialization line and a second initialization line, wherein the pixel circuit further comprises a second reset transistor, the second reset transistor is connected to the first electrode of the light-emitting element, the first initialization line is connected to the first reset transistor, the second initialization line is connected to the second reset transistor, the first initialization line comprises a first initialization signal line extending along the first direction and a first initialization connection line extending along the second direction, the second initialization line comprises a second initialization signal line extending along the first direction and a second initialization connection line extending along the second direction, and the first initialization connection line, the first conductive line and the second initialization connection line are sequentially arranged adjacent to each other along the first direction. 
     
     
         20 . The display panel according to  claim 19 , wherein the first initialization connection line comprises a second conductive connection component, the first initialization signal line and the first reset transistor are connected through the second conductive connection component, and the second conductive connection component is located between two adjacent sub-lines. 
     
     
         21 . The display panel according to  claim 16 , wherein the second conductive line has a main portion and a branch portion, the branch portion is branched from the main portion, the orthographic projection of the first electrode of the light-emitting element on the base substrate overlaps with an orthographic projection of the main portion on the base substrate, and overlaps with an orthographic projection of the branch portion on the base substrate. 
     
     
         22 . The display panel according to  claim 21 , further comprising a flattening element, wherein the orthographic projection of the first electrode of the light-emitting element on the base substrate overlaps with an orthographic projection of the flattening element on the base substrate, and the flattening element and the branch portion are disposed on both sides of the main portion, respectively,
 wherein the flattening element and the main portion are in a same layer and arranged at intervals, the flattening element extends along the second direction, and the flattening element is connected to the first electrode of the light-emitting element through a third via hole,   wherein a width of the main portion is greater than a width of the branch portion, and is greater than a width of the flattening element in the first direction.   
     
     
         23 - 24 . (canceled) 
     
     
         25 . The display panel according to  claim 19 , wherein the first initialization signal line has a block, and an orthographic projection of a conductive portion connected to two channels arranged at intervals in the active layer of the threshold compensation transistor on the base substrate overlaps with an orthographic projection of the block on the base substrate. 
     
     
         26 . The display panel according to  claim 3 , wherein the first electrode of the light-emitting element has a second protrusion, and an orthographic projection of the second protrusion on the base substrate overlaps with an orthographic projection of at least one of an active layer of the first reset transistor and the active layer of the threshold compensation transistor on the base substrate. 
     
     
         27 . (canceled) 
     
     
         28 . A display apparatus, comprising the display panel according to  claim 1 .