Nitride semiconductor device

Abstract

This nitride semiconductor device includes: a gate layer that is formed on an electron supply layer; a gate electrode that is formed on the gate layer; a passivation layer that covers the electron supply layer, the gate layer, and the gate electrode and has a first opening and a second opening that are separated in the X direction; and a field plate electrode that is formed on the passivation layer and is electrically connected to a source electrode. The field plate electrode includes a plate extension that extends to a region between the gate layer and a drain electrode in a plan view and opposes the electron supply layer with the passivation layer therebetween. An opening is formed in the plate extension of the field plate electrode.

What is claimed is: 
     
         1 . A nitride semiconductor device, comprising:
 an electron transit layer composed of a nitride semiconductor;   an electron supply layer formed on the electron transit layer and composed of a nitride semiconductor having a band gap that is larger than that of the electron transit layer;   a gate layer formed on the electron supply layer and composed of a nitride semiconductor including an acceptor impurity;   a gate electrode formed on the gate layer;   a passivation layer covering the electron supply layer, the gate layer, and the gate electrode, the passivation layer including a first opening and a second opening separated from each other in a first direction, the gate layer being disposed between the first opening and the second opening;   a source electrode in contact with the electron supply layer through the first opening;   a drain electrode in contact with the electron supply layer through the second opening; and   a filed plate electrode arranged on the passivation layer and electrically connected to the source electrode, wherein   the filed plate electrode includes a plate extension extending in a region between the gate layer and the drain electrode in plan view and being opposed to the electron supply layer via the passivation layer, and   the filed plate electrode has an opening formed in at least one of the plate extension and a position that overlaps the gate layer in plan view.   
     
     
         2 . The nitride semiconductor device according to  claim 1 , wherein at least a portion of the opening is formed in the plate extension. 
     
     
         3 . The nitride semiconductor device according to  claim 2 , wherein
 the plate extension includes a plate distal surface opposed to the drain electrode,   the opening is a recess recessed from the plate distal surface toward the gate layer,   in plan view, a second direction is orthogonal to the first direction, the recess has a width in the second direction and a depth in the first direction and is open toward the drain electrode.   
     
     
         4 . The nitride semiconductor device according to  claim 3 , wherein a depth of the recess is greater than ½ of a dimension of the plate extension in the first direction. 
     
     
         5 . The nitride semiconductor device according to  claim 4 , wherein
 the filed plate electrode includes a gate opposing portion opposed to the gate layer via the passivation layer,   the recess extends farther than the plate extension does from the plate distal surface in the first direction over the plate extension and the gate opposing portion.   
     
     
         6 . The nitride semiconductor device according to  claim 3 , wherein the recess includes multiple recesses separated from each other in the second direction. 
     
     
         7 . The nitride semiconductor device according to  claim 6 , wherein the recesses are separated from each other by a distance that is greater than a width of each recess. 
     
     
         8 . The nitride semiconductor device according to  claim 6 , wherein the recess has a width that is greater than a distance between the recesses. 
     
     
         9 . The nitride semiconductor device according to  claim 3 , wherein the recess has a curved bottom surface. 
     
     
         10 . The nitride semiconductor device according to  claim 2 , wherein
 the plate extension includes a plate distal surface opposed to the drain electrode, and   the opening is closed and is located closer to the gate electrode than the plate distal surface is.   
     
     
         11 . The nitride semiconductor device according to  claim 10 , wherein, in plan view, the opening is rectangular so that long sides thereof extend in the first direction and short sides thereof extend in a second direction that is orthogonal to the first direction. 
     
     
         12 . The nitride semiconductor device according to  claim 11 , wherein a dimension of the opening in the first direction is greater than ½ of a dimension of the plate extension in the first direction. 
     
     
         13 . The nitride semiconductor device according to  claim 10 , wherein, in plan view, the opening is rectangular so that short sides thereof extend in the first direction and long sides thereof extend in a second direction that is orthogonal to the first direction. 
     
     
         14 . The nitride semiconductor device according to  claim 10 , wherein
 the filed plate electrode includes a gate opposing portion opposed to the gate layer via the passivation layer, and   the opening extends over the plate extension and the gate opposing portion.   
     
     
         15 . The nitride semiconductor device according to  claim 1 , wherein at least a portion of the opening overlaps the gate layer in plan view. 
     
     
         16 . The nitride semiconductor device according to  claim 15 , wherein
 the filed plate electrode includes a gate opposing portion opposed to the gate layer via the passivation layer, and   the opening is formed in at least the gate opposing portion.   
     
     
         17 . The nitride semiconductor device according to  claim 15 , wherein
 the gate layer and the drain electrode extend in a second direction that is orthogonal to the first direction in plan view, and   in a region in which the opening overlaps the gate layer in plan view, the opening is formed in an entire region where the gate layer is opposed to the drain electrode in the first direction.   
     
     
         18 . The nitride semiconductor device according to  claim 1 , wherein the opening is circular or elliptical.