Systems and methods for analyzing nanotopography of front-end processed semiconductor wafers

Abstract

Systems and methods of processing semiconductor wafers using nanotopography analysis of a front-end processed (e.g., ground) wafer surface. The systems and methods execute a wafer analysis model that filters out roughness defects from the front-end processed wafer surface to enable the nanotopography analysis. In one example, a method of processing semiconductor wafers includes obtaining image data of a surface of a pre-polished wafer; processing the image data by: generating linear profiles of the surface, applying a regression analysis to smooth each linear profile, and recombining the smoothed linear profiles to obtain processed image data; determining a nanotopography of the surface of the pre-polished wafer from the processed image data; and based on the determined nanotopography of the surface, either sorting the pre-polished wafer for polishing or adjusting a front end process performed on the pre-polished wafer.

What is claimed is: 
     
         1 . A method of processing semiconductor wafers, the method comprising:
 obtaining, with an inspection tool, image data of a surface of a pre-polished wafer;   processing, with a computing device in communication with the inspection tool, the image data by:
 generating linear profiles of the surface, 
 applying a regression analysis to smooth each linear profile, and 
 recombining the smoothed linear profiles to obtain processed image data; 
   determining, with the computing device, a nanotopography of the surface of the pre-polished wafer from the processed image data; and   based on the determined nanotopography of the surface, either:
 sorting the pre-polished wafer for polishing; or 
 adjusting a front end process performed on the pre-polished wafer. 
   
     
     
         2 . The method of  claim 1 , wherein applying the regression analysis includes applying a polynomial fit to smooth each linear profile. 
     
     
         3 . The method of  claim 2 , wherein the polynomial fit is an order of nine (9) or more. 
     
     
         4 . The method of  claim 1 , wherein each linear profile is generated between a center of the surface and a peripheral edge of the wafer. 
     
     
         5 . The method of  claim 1 , wherein each linear profile is generated along a diameter of the wafer. 
     
     
         6 . The method of  claim 1 , wherein the wafer defines a central axis extending through a center of the surface of the wafer in a first direction, wherein each linear profile is generated along the surface of the wafer in a second direction that is perpendicular to the first direction. 
     
     
         7 . The method of  claim 1 , further comprising applying, with the computing device, a blur filter to the processed image data prior to determining the nanotopography of the surface of the pre-polished wafer. 
     
     
         8 . The method of  claim 1 , further comprising tuning, with the computing device, a contrast of the processed image data prior to determining the nanotopography of the surface of the pre-polished wafer. 
     
     
         9 . The method of  claim 1 , wherein the image of the surface of the pre-polished wafer is obtained using an optical wafer inspection tool. 
     
     
         10 . The method of  claim 1 , wherein the pre-polished wafer includes a roughness feature on the surface that increases a roughness of the surface. 
     
     
         11 . The method of  claim 10 , wherein the roughness feature includes one or more marks on the surface from a grinding operation. 
     
     
         12 . The method of  claim 1 , wherein the wafer is a single crystal silicon wafer. 
     
     
         13 . A system for processing semiconductor wafers, the system comprising:
 one or more front end process devices;   an inspection tool configured to obtain image data of a surface of a pre-polished wafer; and   a computer device in communication with the one or more front end process devices and the inspection tool, the computer device comprising at least one processor in communication with at least one memory device, wherein the at least one processor is programmed to:
 generate linear profiles of the surface; 
 apply a regression analysis to smooth each linear profile; 
 recombine the smoothed linear profiles to obtain processed image data; 
 determine a nanotopography of the surface of the pre-polished wafer from the processed image data; and 
 based on the determined nanotopography of the surface, adjust a front end process performed by the one or more front end process devices on the pre-polished wafer. 
   
     
     
         14 . The system of  claim 13 , wherein the at least one processor is further programmed to apply the regression analysis by applying a polynomial fit to smooth each linear profile. 
     
     
         15 . The system of  claim 14 , wherein the at least one processor is further programmed to apply the polynomial fit by applying a polynomial fit having an order of nine (9) or more. 
     
     
         16 . The system of  claim 13 , wherein the at least one processor is further programmed to generate the linear profiles of the surface by generating each linear profile between a center of the surface and a peripheral edge of the wafer. 
     
     
         17 . The system of  claim 13 , wherein the at least one processor is further programmed to generate the linear profiles of the surface by generating each linear profile along a diameter of the wafer. 
     
     
         18 . The system of  claim 13 , wherein the wafer defines a central axis extending through a center of the surface of the wafer in a first direction, wherein the at least one processor is further programmed to generate the linear profiles of the surface by generating each linear profile along the surface of the wafer in a second direction that is perpendicular to the first direction. 
     
     
         19 . The system of  claim 13 , wherein the at least one processor is further programmed to apply a blur filter to the processed image data prior to determining the nanotopography of the surface of the pre-polished wafer. 
     
     
         20 . The system of  claim 13 , wherein the at least one processor is further programmed to tune a contrast of the processed image data prior to determining the nanotopography of the surface of the pre-polished wafer. 
     
     
         21 . The system of  claim 13 , wherein the inspection tool comprises an optical wafer inspection tool. 
     
     
         22 . The system of  claim 13 , wherein the one or more front end process devices comprises a slicer, a grinder, or a polishing device.