US2025393272A1PendingUtilityA1

Bjt with backside base contact

Assignee: IBMPriority: Jun 24, 2024Filed: Jun 24, 2024Published: Dec 25, 2025
Est. expiryJun 24, 2044(~17.9 yrs left)· nominal 20-yr term from priority
H10D 10/60H10D 62/184H10D 64/231H10D 64/281H10W 70/658H10D 62/137H10D 10/40H10D 64/01H01L 23/49844
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Claims

Abstract

Semiconductor devices include a semiconductor well layer having a first dopant polarity. A collector terminal is on a top surface of the semiconductor well layer, having a second dopant polarity. An emitter terminal is on the top surface of the semiconductor well layer, having the second dopant polarity. A conductor contacts a bottom surface of the semiconductor well layer and extends laterally below the collector terminal and the emitter terminal.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device, comprising:
 a semiconductor well layer having a first dopant polarity;   a collector terminal on a top surface of the semiconductor well layer, having a second dopant polarity;   an emitter terminal on the top surface of the semiconductor well layer, having the second dopant polarity; and   a conductor that contacts a bottom surface of the semiconductor well layer and that extends laterally below the collector terminal and the emitter terminal.   
     
     
         2 . The semiconductor device of  claim 1 , further comprising a base terminal having the first dopant polarity, wherein the conductor electrically connects the base terminal and the semiconductor well layer. 
     
     
         3 . The semiconductor device of  claim 2 , wherein the conductor has a top surface that is parallel to the top surface of the semiconductor well layer and wherein the base terminal is positioned on the top surface of the conductor. 
     
     
         4 . The semiconductor device of  claim 2 , further comprising a vertical dielectric barrier between the conductor and a side surface of the semiconductor well layer, the vertical dielectric barrier extending to a depth below a bottom surface of the semiconductor well layer. 
     
     
         5 . The semiconductor device of  claim 2 , further comprising respective frontside contacts to the collector terminal, the emitter terminal, and the base terminal. 
     
     
         6 . The semiconductor device of  claim 1 , wherein the semiconductor well layer includes a highly doped layer at the bottom surface that has a higher dopant concentration than a remainder of the semiconductor well layer. 
     
     
         7 . The semiconductor device of  claim 6 , wherein the highly doped layer has a thickness between about 40 nm and about 50 nm from the bottom surface of the semiconductor well layer. 
     
     
         8 . The semiconductor device of  claim 1 , further comprising a backside contact to the conductor. 
     
     
         9 . The semiconductor device of  claim 8 , further comprising a terminal adjacent to the collector terminal and the emitter terminal, having the first dopant polarity, that is not electrically connected to the semiconductor well layer. 
     
     
         10 . The semiconductor device of  claim 8 , further comprising respective frontside contacts to the collector terminal and to the emitter terminal. 
     
     
         11 . A semiconductor device, comprising:
 a semiconductor well layer having a first dopant polarity;   a collector terminal on a top surface of the semiconductor well layer, having a second dopant polarity;   an emitter terminal on the top surface of the semiconductor well layer, having the second dopant polarity;   a base terminal having the first dopant polarity;   a conductor that electrically connects to the base terminal and a bottom surface of the semiconductor well layer and that extends laterally below the collector terminal and the emitter terminal; and   a vertical dielectric barrier between the conductor and a side surface of the semiconductor well layer, the vertical dielectric barrier extending to a depth below a bottom surface of the semiconductor well layer.   
     
     
         12 . The semiconductor device of  claim 11 , wherein the base terminal is on a surface of the conductor that is parallel to the top surface of the semiconductor well layer. 
     
     
         13 . The semiconductor device of  claim 11 , further comprising respective frontside contacts to the collector terminal, the emitter terminal, and the base terminal. 
     
     
         14 . The semiconductor device of  claim 11 , wherein the semiconductor well layer includes a highly doped layer at the bottom surface that has a higher dopant concentration than a remainder of the semiconductor well layer. 
     
     
         15 . The semiconductor device of  claim 14 , wherein the highly doped layer has a thickness between about 40 nm and about 50 nm from the bottom surface of the semiconductor well layer. 
     
     
         16 . A semiconductor device, comprising:
 a semiconductor well layer having a first dopant polarity;   a collector terminal on a top surface of the semiconductor well layer, having a second dopant polarity;   an emitter terminal on the top surface of the semiconductor well layer, having the second dopant polarity;   a conductor that contacts a bottom surface of the semiconductor well layer and that extends laterally below the collector terminal and the emitter terminal; and   a backside contact to the conductor.   
     
     
         17 . The semiconductor device of  claim 16 , wherein the semiconductor well layer includes a highly doped layer at the bottom surface that has a higher dopant concentration than a remainder of the semiconductor well layer. 
     
     
         18 . The semiconductor device of  claim 17 , wherein the highly doped layer has a thickness between about 40 nm and about 50 nm from the bottom surface of the semiconductor well layer. 
     
     
         19 . The semiconductor device of  claim 16 , further comprising a terminal having the first dopant polarity that is not electrically connected to the semiconductor well layer. 
     
     
         20 . The semiconductor device of  claim 16 , further comprising respective frontside contacts to the collector terminal and to the emitter terminal.

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