Neural volterra digital compensator with envelope neural network

Abstract

Aspects of this disclosure relate to digital compensators, such as digital predistortion systems. Digital predistortion systems disclosed herein use a neural Volterra approach. Such digital predistortion systems can include a first processing path, an envelope processing path comprising an envelope artificial neural network, multipliers configured to multiply respective output signals of the first processing path and the envelope processing path, and a combiner configured to generate a combined output signal based on at least output signals of the multipliers. The combined output signal is a digitally predistorted version of the input signal.

1 . A digital predistortion system comprising:
 a first processing path configured to process an input signal;   an envelope processing path configured to derive an envelope of the input signal and apply a non-linear gain function, the envelope processing path comprising an envelope artificial neural network;   multipliers configured to multiply respective output signals of the first processing path and the envelope processing path; and   a combiner configured to generate a combined output signal based on at least output signals of the multipliers and output the combined output signal, the combined output signal being a digitally predistorted version of the input signal.   
     
     
         2 . The digital predistortion system of  claim 1 , wherein the envelope processing path comprises a feature preprocessing block configured to transform the input signal from a complex signal to a real signal, the feature preprocessing block having an output coupled to an input of the envelope artificial neural network. 
     
     
         3 . The digital predistortion system of  claim 1 , wherein the envelope processing path comprises:
 a signal partitioning block configured to delay and partition a signal provided by the envelope artificial neural network; and   a gain block comprising a plurality of non-linear gain blocks configured to apply non-linear transformations to implement the non-linear gain function, the gain block coupled between the signal partitioning block and the multipliers.   
     
     
         4 . The digital predistortion system of  claim 3 , wherein the plurality of non-linear gain blocks comprise look up tables. 
     
     
         5 . The digital predistortion system of  claim 3 , further comprising a set of combiners coupled between the plurality of non-linear gain blocks and the multipliers, each combiner of the set of combiners configured to combine outputs of a group of non-linear gain blocks of the plurality of non-linear gain blocks. 
     
     
         6 . The digital predistortion system of  claim 3 , further comprising:
 a second set of multipliers; and   a second set of non-linear gain blocks coupled between the signal partitioning block and the second set of multipliers,   wherein the combiner is configured to combine at least output signals from the multipliers and output signals from the second set of multipliers to generate the combined output signal.   
     
     
         7 . The digital predistortion system of  claim 1 , wherein the envelope artificial neural network is configured to receive at least one of a sensor input signal or an external input signal. 
     
     
         8 . The digital predistortion system of  claim 1 , wherein the envelope artificial neural network has a plurality of outputs. 
     
     
         9 . The digital predistortion system of  claim 1 , wherein the first processing path comprises a feature preprocessing block configured to perform a complex-to-complex transformation, and wherein the feature preprocessing block is configured to perform complex multiplications. 
     
     
         10 . The digital predistortion system of  claim 1 , wherein the first processing path comprises a feature artificial neural network. 
     
     
         11 . The digital predistortion system of  claim 1 , further comprising:
 Volterra processing blocks comprising non-linear processing blocks, non-linear gain blocks having inputs connected to outputs of the non-linear processing blocks, a set of combiners each configured to combine output signals of at least two of the non-linear gain blocks, and a second set of multipliers coupled to the set of combiners;   wherein the combiner is configured to combine output signals from the second set of multipliers with the output signals from the multipliers to generate the combined output signal.   
     
     
         12 . The digital predistortion system of  claim 1 , wherein a transceiver integrated circuit includes the digital predistortion system. 
     
     
         13 . The digital predistortion system of  claim 1 , wherein the input signal is a digital baseband signal that comprises a data stream of in-phase and quadrature samples, and wherein the digital predistortion system is configured to perform sample rate digital predistortion. 
     
     
         14 . A method of digital predistortion, the method comprising:
 transforming a digital input signal in a complex-valued domain;   generating an envelope signal from the digital input signal using at least an envelope artificial neural network;   applying non-linear gain function to the envelope signal;   multiplying signals generated by the transforming with signals generated by the applying; and   generating a combined output signal based on at least output signals generated by the multiplying, wherein the combined output signal is a digitally predistorted version of the digital input signal.   
     
     
         15 . The method of  claim 14 , wherein the generating the envelope signal comprises:
 transforming the input signal from a complex signal to a real signal, the envelope artificial neural network configured to receive the real signal; and   delaying and partitioning a signal provided by the envelope artificial neural network.   
     
     
         16 . The method of  claim 14 , wherein the envelope artificial neural network receives a sensor input signal from a sensor. 
     
     
         17 . The method of  claim 14 , further comprising performing Volterra processing on the digital input signal, wherein the combining comprises combining output signals of the Volterra processing with the output signals generated by the multiplying. 
     
     
         18 . A wireless communication system comprising:
 a transceiver integrated circuit comprising a digital predistortion system, the digital predistortion system comprising:
 an envelope processing path configured to derive an envelope of an input signal and apply a non-linear gain function, the envelope processing path comprising an envelope artificial neural network; 
 multipliers configured to multiply output signals of the envelope processing path and output signals of another processing path; and 
 a combiner configured to generate a combined output signal based on at least output signals of the multipliers and output the combined output signal, the combined output signal being a digitally predistorted version of the input signal; and 
   a power amplifier in communication with the transceiver integrated circuit, the digital predistortion system configured to reduce non-linearity of the power amplifier.   
     
     
         19 . The wireless communication system of  claim 18 , wherein the transceiver integrated circuit further comprises a sensor having an output connected to an input of the envelope artificial neural network. 
     
     
         20 . The wireless communication system of  claim 18 , wherein:
 a digital predistortion actuator of the transceiver integrated circuit comprises the envelope processing path, the multipliers, and the combiner; and   the transceiver integrated circuit further comprises a digital predistortion adaptation circuit in communication with the digital predistortion actuator.