US2025385697A1PendingUtilityA1

Reconfigurable multi-feedback filter for mmw receivers

Assignee: QUALCOMM INCPriority: Jun 18, 2024Filed: Jun 18, 2024Published: Dec 18, 2025
Est. expiryJun 18, 2044(~17.9 yrs left)· nominal 20-yr term from priority
H04B 1/1018H03H 7/065H03H 11/1291H03H 11/126H04B 1/0078H03H 11/1295
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Claims

Abstract

Aspects described herein include devices and methods for a reconfigurable multi-feedback filter for wireless receivers. In one aspect, a device may include a signal input node, a signal output, and an amplifier having an amplifier output, a negative input, and a positive input. The positive input is coupled to a reference voltage, and the amplifier output is coupled to the signal output. The device may further include a twin-T network in a feedback path coupled from the amplifier output to the negative input, where the twin-T network comprises a first capacitor and a second capacitor serially coupled between the amplifier output and the negative input of the amplifier, where the first capacitor and the second capacitor are connected via a first node, and where the signal input node is coupled to the first node.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A filter apparatus comprising:
 a signal input node;   a signal output;   an amplifier having an amplifier output, a negative input, and a positive input, wherein the positive input is coupled to a reference voltage, and wherein the amplifier output is coupled to the signal output; and   a twin-T network in a feedback path coupled from the amplifier output to the negative input, wherein the twin-T network comprises a first capacitor and a second capacitor serially coupled between the amplifier output and the negative input of the amplifier, wherein the first capacitor and the second capacitor are connected via a first node, and wherein the signal input node is coupled to the first node.   
     
     
         2 . The filter apparatus of  claim 1 , wherein the twin-T network further comprises:
 a first resistor and a second resistor serially coupled between the amplifier output and the negative input of the amplifier, wherein the first resistor and the second resistor are connected via a second node, wherein the signal input node is coupled to the second node, and wherein the second node is coupled to a reference node via a fourth capacitor.   
     
     
         3 . The filter apparatus of  claim 2 , wherein the signal input node is coupled to the first node via a third capacitor, wherein the signal input node is coupled to the second node via a third resistor. 
     
     
         4 . The filter apparatus of  claim 3 , further comprising a fourth resistor coupled in parallel across the first capacitor. 
     
     
         5 . The filter apparatus of  claim 4 , further comprising high frequency real pole circuitry coupled to the signal input node. 
     
     
         6 . The filter apparatus of  claim 5 , wherein the high frequency real pole circuitry comprises:
 a fifth resistor coupled between a second input node and the signal input node;   a fifth capacitor coupled between the signal input node and the reference node; and   the fourth capacitor.   
     
     
         7 . The filter apparatus of  claim 6 , further comprising a plurality of switches in the feedback path configurable for multiple operational configurations. 
     
     
         8 . The filter apparatus of  claim 7 , wherein the multiple operational configurations comprise a Rauch filter configuration and a Rauch filter with a transmission zero filter configuration. 
     
     
         9 . The filter apparatus of  claim 8 , wherein the multiple operational configurations further comprise a programmable gain amplifier (PGA) configuration. 
     
     
         10 . The filter apparatus of  claim 9 , wherein the plurality of switches comprise:
 a first switch coupled between the signal input node and the third capacitor;   a second switch coupled between the signal input node and the fifth resistor;   a third switch coupled between the fourth capacitor and a node between the second resistor and the third resistor;   a fourth switch coupled between the first resistor and the node between the second resistor and the third resistor;   a fifth switch coupled between the negative input and the second capacitor;   a sixth switch coupled between the second capacitor and the fourth resistor;   a seventh switch coupled between the negative input and the fourth resistor;   an eighth switch coupled between the second capacitor and the first capacitor; and   a ninth switch coupled between the negative input and the first capacitor.   
     
     
         11 . The filter apparatus of  claim 10 , wherein control circuitry coupled to the plurality of switches closes the second switch, the seventh switch, and the ninth switch, and opens the first, third, fourth, fifth, sixth, and eighth switches for the PGA configuration. 
     
     
         12 . The filter apparatus of  claim 11 , wherein the control circuitry closes the third, fourth, and ninth switches and opens the first, second, third, fifth, sixth, seventh, and eighth switches for the Rauch filter configuration. 
     
     
         13 . The filter apparatus of  claim 12 , wherein the control circuitry closes the first, third fourth, fifth, seventh, and ninth switches and opens the second, sixth, and eighth switches for the Rauch filter with the transmission zero filter configuration. 
     
     
         14 . The filter apparatus of  claim 1 , further comprising high frequency real pole circuitry coupled to the signal input node. 
     
     
         15 . The filter apparatus of  claim 14 , wherein the high frequency real pole circuitry comprises:
 an input resistor coupled between a second input node and the signal input node; and   a fifth capacitor coupled between the signal input node and a reference node.   
     
     
         16 . The filter apparatus of  claim 15 , further comprising a tenth switch coupled between the fifth capacitor and the signal input node, wherein the tenth switch enables and disables the high frequency real pole circuitry. 
     
     
         17 . The filter apparatus of  claim 1 , wherein the filter apparatus comprises a baseband filter in a receive signal path for a downconverted millimeter wave (mmW) signal. 
     
     
         18 . A filter apparatus comprising:
 means for filtering a baseband signal in a receive signal path for a downconverted millimeter wave signal; and   means for suppressing an aliasing signal generated by a low clock-rate analog to digital converter in the receive signal path of a multi-downlink pipe (DLP) receiver of a millimeter wave communication device.   
     
     
         19 . A method of operating a wireless communication device, the method comprising:
 receiving a wireless millimeter wave communication signal;   downconverting the wireless millimeter wave communication signal to a baseband communication signal;   filtering the baseband communication signal using a filter apparatus comprising a twin-T network in a feedback path with notch rejection at aliasing frequencies associated with a low clock-rate analog to digital converter to generate a filtered baseband communication signal; and   converting the filtered baseband communication signal to a digital signal using the low clock-rate analog to digital converter.   
     
     
         20 . The method of  claim 19 , wherein the filter apparatus comprises a signal input node, a signal output, an amplifier having an amplifier output, a negative input, and a positive input, wherein the positive input is coupled to a reference voltage, and wherein the amplifier output is coupled to the signal output, and the twin-T network in the feedback path coupled from the amplifier output to the negative input, wherein the twin-T network comprises a first capacitor and a second capacitor serially coupled between the amplifier output and the negative input of the amplifier, wherein the first capacitor and the second capacitor are connected via a first node, and wherein the signal input node is coupled to the first node; and
 wherein the twin-T network further comprises:   a first resistor and a second resistor serially coupled between the amplifier output and the negative input of the amplifier, wherein the first resistor and the second resistor are connected via a second node, wherein the signal input node is coupled to the second node, and wherein the second node is coupled to a reference node via a third capacitor.

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