Electronic device including thermal interface material layer and semiconductor package

Abstract

An electronic device includes a substrate, a first plate having a first internal surface facing a first surface of the substrate, and at least one first through-hole and at least one second through-hole, first and second semiconductor packages spaced apart from each other between the first surface and the first internal surface, a first thermal interface material layer contacting an upper surface of the first semiconductor package and the first internal surface, and filling at least a portion of the at least one first through-hole, and a second thermal interface material layer contacting an upper surface of the second semiconductor package and the first internal surface, and filling at least a portion of the at least one second through-hole. At least one of side surfaces of the first and second thermal interface material layers is exposed to an empty space between the first internal surface and the first surface.

What is claimed is: 
     
         1 . An electronic device, comprising:
 a first semiconductor package;   a plate including a first plate portion and a first through-hole penetrating through the first plate portion in a vertical direction; and   a first thermal interface material layer,
 wherein the vertical direction is perpendicular to an upper surface of the first semiconductor package, 
 wherein the first plate portion includes
 a first internal surface facing the first semiconductor package, 
 a first external surface opposing the first internal surface, and 
 a first groove recessed from the first internal surface in a direction away from the upper surface of the first semiconductor package, 
 
   wherein the first thermal interface material layer fills at least a portion of the first through-hole, extends between the first semiconductor package and the first plate portion, and fills the first groove, and   wherein the first thermal interface material layer is in contact with the upper surface of the first semiconductor package and the first internal surface of the first plate portion.   
     
     
         2 . The electronic device as claimed in  claim 1 , wherein the first groove is spaced apart from the first through-hole. 
     
     
         3 . The electronic device as claimed in  claim 1 , wherein the first groove has a closed loop shape. 
     
     
         4 . The electronic device as claimed in  claim 3 , wherein the first groove includes a first portion and a second portion extending from the first portion, and
 wherein a width of the first portion is different from a width of the second portion.   
     
     
         5 . The electronic device as claimed in  claim 1 , wherein the first through-hole overlaps with a center of the upper surface of the first semiconductor package in the vertical direction. 
     
     
         6 . The electronic device as claimed in  claim 1 , wherein the first thermal interface material layer does not cover a side surface of the first semiconductor package. 
     
     
         7 . The electronic device as claimed in  claim 1 , wherein a width of the first semiconductor package in a first direction is different from a width of the first plate portion in the first direction, and
 wherein the first direction is parallel to the upper surface of the first semiconductor package.   
     
     
         8 . The electronic device as claimed in  claim 1 , further comprising:
 a second semiconductor package spaced apart from the first semiconductor package; and   a second thermal interface material layer,   wherein the plate further includes a second plate portion and a second through-hole penetrating through the second plate portion in the vertical direction,   wherein the second plate portion includes
 a second internal surface facing the second semiconductor package, 
 a second external surface opposing the second internal surface, and 
 a second groove recessed from the second internal surface in a direction away from an upper surface of the second semiconductor package, 
   wherein the second thermal interface material layer fills at least a portion of the second through-hole, extends between the second semiconductor package and the second plate portion, and fills the second groove, and   wherein the second thermal interface material layer is in contact with the upper surface of the second semiconductor package and the second internal surface of the second plate portion.   
     
     
         9 . The electronic device as claimed in  claim 8 , wherein a thickness of the first plate portion is greater than a thickness of the second plate portion. 
     
     
         10 . The electronic device as claimed in  claim 9 , wherein the first external surface of the first plate portion and the second external surface of the second plate portion are coplanar. 
     
     
         11 . The electronic device as claimed in  claim 8 , wherein a thickness of the first semiconductor package is greater than a thickness of the second semiconductor package. 
     
     
         12 . The electronic device as claimed in  claim 8 , wherein the plate further includes a third plate portion between the first plate portion and the second plate portion. 
     
     
         13 . The electronic device as claimed in  claim 12 , wherein a thickness of the third plate portion is different from at least one of a thickness of the first semiconductor package and a thickness of the second semiconductor package. 
     
     
         14 . The electronic device as claimed in  claim 8 ,
 wherein the second thermal interface material layer is different from the first thermal interface material layer.   
     
     
         15 . The electronic device as claimed in  claim 8 , further comprising:
 a third semiconductor package spaced apart from the first and second semiconductor packages; and   a third thermal interface material layer,   wherein the plate further includes a third plate portion and a third through-hole penetrating through the third plate portion in the vertical direction,   wherein the third plate portion includes
 a third internal surface facing the third semiconductor package, 
 a third external surface opposing the third internal surface, and 
 a third groove recessed from the third internal surface in a direction away from an upper surface of the third semiconductor package, 
   wherein the third thermal interface material layer fills at least a portion of the third through-hole, extends between the third semiconductor package and the third plate portion, and fills the third groove, and   wherein the third thermal interface material layer is in contact with the upper surface of the third semiconductor package and the third internal surface of the third plate portion.   
     
     
         16 . An electronic device, comprising:
 a case including a first plate and a second plate facing the first plate;   a first semiconductor package adjacent to the first plate and between the first plate and the second plate;   a second semiconductor package adjacent to the second plate and between the first plate and the second plate; and   a first thermal interface material layer and a second thermal interface material layer spaced apart from each other,   wherein the first plate includes a first plate portion and a first through-hole penetrating through the first plate portion in a vertical direction,   wherein the second plate includes a second plate portion and a second through-hole penetrating through the second plate portion in the vertical direction,   wherein the first plate portion includes
 a first internal surface facing the first semiconductor package, 
 a first external surface opposing the first internal surface, and 
 a first groove recessed from the first internal surface in a direction away from an upper surface of the first semiconductor package; and 
   wherein the second plate portion includes
 a second internal surface facing the second semiconductor package, 
 a second external surface opposing the second internal surface, and 
 a second groove recessed from the second internal surface in a direction away from an upper surface of the second semiconductor package, 
   wherein the first thermal interface material layer fills at least a portion of the first through-hole, extends between the first semiconductor package and the first plate portion, and fills the first groove, and   wherein the second thermal interface material layer fills at least a portion of the second through-hole, extends between the second semiconductor package and the second plate portion, and fills the second groove.   
     
     
         17 . The electronic device as claimed in  claim 16 , wherein the first thermal interface material layer is in contact with the upper surface of the first semiconductor package and the first internal surface of the first plate portion, and
 wherein the second thermal interface material layer is in contact with the upper surface of the second semiconductor package and the second internal surface of the second plate portion.   
     
     
         18 . The electronic device as claimed in  claim 16 , wherein the first groove is spaced apart from the first through-hole, and
 wherein the second groove is spaced apart from the second through-hole.   
     
     
         19 . An electronic device, comprising:
 a base having a first surface and a second surface opposing the first surface;   a first semiconductor package and a second semiconductor package spaced apart from each other and on the first surface of the base;   a first plate including a first plate portion, a second plate portion, a first through-hole penetrating through the first plate portion in a vertical direction, and a second through-hole penetrating through the second plate portion in the vertical direction; and   a first thermal interface material layer and a second thermal interface material layer,
 wherein the vertical direction is perpendicular to an upper surface of the first surface of the base, 
 wherein the first plate portion includes
 a first internal surface facing the first semiconductor package, 
 a first external surface opposing the first internal surface, and 
 a first groove recessed from the first internal surface in a direction away from the upper surface of the first semiconductor package, and 
 
 wherein the second plate portion includes
 a second internal surface facing the second semiconductor package, 
 a second external surface opposing the second internal surface, and 
 a second groove recessed from the second internal surface in a direction away from an upper surface of the second semiconductor package; 
 
   wherein the first thermal interface material layer fills at least a portion of the first through-hole, extends between the first semiconductor package and the first plate portion, and fills the first groove,   wherein the second thermal interface material layer fills at least a portion of the second through-hole, extends between the second semiconductor package and the second plate portion, and fills the second groove,   wherein the first thermal interface material layer is in contact with the upper surface of the first semiconductor package and the first internal surface of the first plate portion, and   wherein the second thermal interface material layer is in contact with the upper surface of the second semiconductor package and the second internal surface of the second plate portion.   
     
     
         20 . The electronic device as claimed in  claim 19 , further comprising:
 a second plate;   a third semiconductor package and a fourth semiconductor package spaced apart from each other and below the second surface of the base; and   a third thermal interface material layer and a fourth thermal interface material layer,   wherein the second plate includes a third plate portion, a fourth plate portion, a third through-hole penetrating through the third plate portion in the vertical direction, and a fourth through-hole penetrating through the fourth plate portion in the vertical direction,   wherein the third plate portion includes
 a third internal surface facing the third semiconductor package, 
 a third external surface opposing the third internal surface, and 
 a third groove recessed from the third internal surface in a direction away from an upper surface of the third semiconductor package, and 
   wherein the fourth plate portion includes
 a fourth internal surface facing the fourth semiconductor package, 
 a fourth external surface opposing the fourth internal surface, and 
 a fourth groove recessed from the fourth internal surface in a direction away from an upper surface of the fourth semiconductor package, 
   wherein the third thermal interface material layer fills at least a portion of the third through-hole, extending between the third semiconductor package and the third plate portion, and filling the third groove,   wherein the fourth thermal interface material layer fills at least a portion of the fourth through-hole, extends between the fourth semiconductor package and the fourth plate portion, and fills the fourth groove,   wherein the third thermal interface material layer is in contact with the upper surface of the third semiconductor package and the third internal surface of the third plate portion, and   wherein the fourth thermal interface material layer is in contact with the upper surface of the fourth semiconductor package and the fourth internal surface of the fourth plate portion.