Semiconductor device, mounting substrate, and electronic device

Abstract

Provided are a semiconductor device in which stress applied to a column connecting a semiconductor package and a wiring board is relaxed, a mounting substrate having the semiconductor device, and an electronic device having the semiconductor device and the mounting substrate. A semiconductor device according to the present disclosure includes a semiconductor package having a plurality of lands on a lower surface, a column having a flange portion at least at an upper end and joined to one of the lands, and a first solder portion joining the land and the flange portion of the column, in which the first solder portion has a melting point equivalent to a melting point of a second solder portion joining a lower end of the column to a land of a wiring board, and the column is joined to the land of the semiconductor package via the first solder portion. Furthermore, the mounting substrate according to the present disclosure is configured so that the lower end of the column of the semiconductor device is joined to the wiring board by the second solder portion. Furthermore, an electronic device including the semiconductor device or the mounting substrate is configured.

1 . A semiconductor device comprising:
 a semiconductor package having a plurality of lands on a lower surface;   a column having a flange portion at least at an upper end and joined to one of the lands; and   a first solder portion joining the land and the flange portion of the column, wherein   the first solder portion has a melting point equivalent to a melting point of a second solder portion joining a lower end of the column to a land of a wiring board, and   the column is joined to the land of the semiconductor package via the first solder portion.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the column has a second flange portion at a lower end. 
     
     
         3 . The semiconductor device according to  claim 1 , wherein the flange portion is covered with the first solder portion, and a portion having a pedestal thickness of the flange portion exists on a straight line connecting an upper end peripheral edge and a rising height h 1  of the first solder portion. 
     
     
         4 . The semiconductor device according to  claim 1 , wherein
 each of the lands of the semiconductor package, the column having the flange portion at least at an upper end, the first solder portion, the second solder portion, and the land of the wiring board   satisfy a relationship of 3D/2≤R≤2D,   satisfy a relationship of 3d≤r≤4d, and   satisfy a relationship of L≥1+H, where   a diameter of the land of the semiconductor package is R,   a diameter of the flange portion at an upper end of the column is D,   a total length of the column is L,   a diameter of a body portion of the column is d,   a diameter of the land of the wiring board to which the lower end of the column is joined is r,   a rising height of the first solder portion from an upper end of the flange portion is h 1 ,   a rising height of the second solder portion from a lower end of the body portion is h 2 , and   a bending margin of the column is l, and   H is a constant satisfying H=h 1 +h 2 .   
     
     
         5 . The semiconductor device according to  claim 1 , wherein
 each of the lands of the semiconductor package, the column having the flange portion at an upper end and the second flange portion at a lower end, the first solder portion, the second solder portion, and the land of the wiring board   satisfy a relationship of 3D/2≤R≤2D,   satisfy a relationship of 3D L /2≤r≤2D L , and   satisfy a relationship of L≥1+H, where   a diameter of the land of the semiconductor package is R,   a diameter of the flange portion at an upper end of the column is D,   a diameter of the second flange portion at a lower end of the column is D L /a   total length of the column is L,   a diameter of the land of the wiring board to which the second flange portion at the lower end of the column is joined is r,   a rising height of the first solder portion from an upper end of the flange portion is h 1 ,   a rising height of the second solder portion from a lower end of the body portion is h 2 , and   a bending margin of the column is l, and   H is a constant satisfying H=h 1 +h 2 .   
     
     
         6 . The semiconductor device according to  claim 4 , wherein a value of the constant H is 0.48 when the column is plated with nickel gold (NiAu). 
     
     
         7 . The semiconductor device according to  claim 1 , wherein in the column, a solder suction band is formed at least in a region of a rising height h 2  of the second solder portion. 
     
     
         8 . The semiconductor device according to  claim 7 , wherein the solder suction band is formed by nickel gold (NiAu) plating. 
     
     
         9 . The semiconductor device according to  claim 7 , wherein the solder suction band has a plurality of grooves formed along an axial direction in a peripheral side surface of the column. 
     
     
         10 . The semiconductor device according to  claim 7 , wherein the solder suction band has a slot passing through an axis of the column. 
     
     
         11 . The semiconductor device according to  claim 7 , wherein the solder suction band has a cross groove passing through an axis of the column. 
     
     
         12 . The semiconductor device according to  claim 1 , wherein the first solder portion and the second solder portion are low-temperature solders having equivalent melting points. 
     
     
         13 . A mounting substrate comprising:
 a semiconductor device including   a semiconductor package having a plurality of lands on a lower surface,   a column having a flange portion at least at an upper end and joined to one of the lands, and   a first solder portion joining the land and the flange portion of the column, wherein   the first solder portion has a melting point equivalent to a melting point of a second solder portion joining a lower end of the column to a land of a wiring board, and   the column is joined to the land of the semiconductor package via the first solder portion, and the semiconductor device is joined to the land of the wiring board via the column and the second solder portion.   
     
     
         14 . An electronic device comprising:
 a semiconductor device including   a semiconductor package having a plurality of lands on a lower surface,   a column having a flange portion at least at an upper end and joined to one of the lands, and   a first solder portion joining the land and the flange portion of the column, wherein   the first solder portion has a melting point equivalent to a melting point of a second solder portion joining a lower end of the column to a land of a wiring board, and   the column is joined to the land of the semiconductor package via the first solder portion; or   a mounting substrate including a semiconductor device in which the column is joined to the land of the semiconductor package via the first solder portion is joined to the land of the wiring board via the column and the second solder portion.