Thermal interface material heat transfer antennas
Abstract
A semiconductor device having a front and a back and comprising a package substrate, an epoxy base layer applied to a back side of the package substrate, and a planar inductor in the epoxy base layer is etched to make a trench at the back of the semiconductor device in the epoxy base layer adjacent the planar inductor, and a thermal interface material is put in the trench, whereby a heat transfer antenna is formed. A semiconductor device has a package substrate having a front and a back; an epoxy base layer applied to a back side of the package substrate, a planar inductor at the back of the package substrate in the epoxy base layer, and a heat transfer antenna at the back of the package substrate in the epoxy base layer.
Claims
exact text as granted — not AI-modified1 . A method comprising:
providing a semiconductor device having a front and a back and comprising:
a package substrate;
an epoxy base layer applied to a back side of the package substrate; and
a planar inductor in the epoxy base layer;
etching a trench at the back of the semiconductor device in the epoxy base layer adjacent the planar inductor; and forming a heat transfer antenna by putting thermal interface material in the trench.
2 . The method as in claim 1 , wherein the trench is in the epoxy base layer adjacent the planar inductor.
3 . The method as in claim 1 , wherein the semiconductor device comprises a die at the back of the semiconductor device and the trench is in the die.
4 . The method as in claim 3 , wherein the trench extends into the die until just before a doped region of the die.
5 . The method as in claim 1 , comprising:
etching a channel at the back of the semiconductor device in the epoxy base layer; and positioning material to form the planar inductor in the channel.
6 . The method as in claim 5 , comprising planarizing a back side of the epoxy base layer and material to form the planar inductor.
7 . The method as in claim 5 , comprising depositing an epoxy cap layer on the back of the semiconductor device, whereby the planar inductor is encapsulated.
8 . The method as in claim 1 , wherein the planar inductor comprises copper.
9 . The method as in claim 1 , wherein the semiconductor device has a thickness of 500 μm-700 μm, and the trench has a width of 5 μm-15 μm and a depth of 50 μm-100 μm.
10 . The method as in claim 1 , comprising putting thermal interface material into the trench with a wiper blade.
11 . The method as in claim 1 , comprising planarizing thermal interface material in the trench at the back of the semiconductor device.
12 . A device comprising:
a package substrate having a front and a back; an epoxy base layer applied to a back side of the package substrate; a planar inductor at the back of the package substrate in the epoxy base layer; and a heat transfer antenna at the back of the package substrate in the epoxy base layer.
13 . The device as in claim 12 , wherein the heat transfer antenna is adjacent the planar inductor.
14 . The device as in claim 12 , comprising a die at the back of the package substrate and the heat transfer antenna is in the die.
15 . The device as in claim 14 , wherein the heat transfer antenna extends into the die until just before a doped region of the die.
16 . The device as in claim 12 , comprising a redistribution layer applied to a front side of the package substrate.
17 . The device as in claim 12 , comprising an epoxy cap layer on the back of the package substrate encapsulating the planar inductor.
18 . The device as in claim 12 , wherein the planar inductor comprises copper.
19 . The device as in claim 12 , wherein the device has a thickness of 500 μm-700 μm, and the heat transfer antenna has a width of 5 μm-15 μm and a depth of 50 μm-100 μm.
20 . The device as in claim 12 , wherein the heat transfer antenna provides shallow trench isolation, whereby the heat transfer antenna reduces electric current leakage between adjacent semiconductor device components.Join the waitlist — get patent alerts
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