US2025366113A1PendingUtilityA1

Semiconductor device having active regions of different dimensions and method of manufacturing the same

Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: Jul 20, 2022Filed: Aug 8, 2025Published: Nov 27, 2025
Est. expiryJul 20, 2042(~16 yrs left)· nominal 20-yr term from priority
H10D 64/511H10D 62/393H10D 30/023H10D 84/83H10D 84/85H10D 84/0167H10D 84/038H10D 84/0128H10D 62/292H10D 89/10
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Claims

Abstract

The present disclosure provides a semiconductor device and a method of manufacturing the same. The semiconductor device includes a substrate, a first active region disposed on the substrate, a first gate structure disposed on the first active region, and a second gate structure disposed on the first active region and spaced apart from the first gate structure. The first active region includes a first portion and a second portion, the first portion of the first active region and the second portion of the first active region collectively specify a first stair profile. The first stair profile is located between the first gate structure and the second gate structure from a top view.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method of manufacturing a semiconductor device, comprising:
 providing a substrate;   forming a first active region on the substrate;   forming a second active region on the substrate;   forming a third active region on the substrate;   forming a first gate structure on the first active region; and   forming a second gate structure on the first active region, wherein   the first active region includes a first portion and a second portion,   the first portion of the first active region and the second portion of the first active region collectively specify a first stair profile; and   the third active region includes a fourth stair profile and a fifth stair profile, wherein distances between a rising edge of the fourth stair profile and adjacent gate structures are substantially the same.   
     
     
         2 . The method of  claim 1 , wherein the first portion of the first active region includes a first width in a first orientation and the second portion of the first active region includes a second width in the first orientation, and wherein the first width is greater than the second width, wherein a distance between the rising edge of the fourth stair profile and a rising edge of the fifth stair profile is equal to that between two adjacent gate structures. 
     
     
         3 . The method of  claim 1 , wherein the first portion of the first active region and the second portion of the first active region collectively specify a second stair profile located between the first gate structure and the second gate structure from a top view, wherein a length of a rising edge of the first stair profile is less than a length of a rising edge of the second stair profile. 
     
     
         4 . The method of  claim 3 , wherein the first stair profile includes a first rise and the second stair profile includes a second rise different from the first rise. 
     
     
         5 . The method of  claim 3 , wherein:
 the second active region and the third active region are disposed on different sides of the first active region from a top view.   
     
     
         6 . The method of  claim 5 , wherein the first stair profile faces the second active region and the second stair profile faces the third active region. 
     
     
         7 . The method of  claim 5 , further comprising forming a fourth active region on the substrate, wherein the fourth active region includes a first portion and a second portion, and the first portion of the fourth active region includes a third width in the first orientation and the second portion of the fourth active region includes a fourth width in the first orientation, and wherein the fourth width is greater than the third width. 
     
     
         8 . The method of  claim 7 , wherein the first portion of the fourth active region includes a third width in the first orientation and the second portion of the fourth active region includes a fourth width in the first orientation, and wherein the first width, the second width, the third width, and the fourth width are different. 
     
     
         9 . The method of  claim 1 , further comprising:
 forming a third gate structure on the first active region;   wherein the fourth stair profile and the fifth stair profile are located on different sides of the third gate structure.   
     
     
         10 . The method of  claim 9 , further comprising forming a fourth gate structure and a fifth gate structure on different sides of the third gate structure, wherein the fourth stair profile are located between the third gate structure and the fourth gate structure, and the fifth stair profile are located between the third gate structure and the fifth gate structure. 
     
     
         11 . A method of manufacturing a semiconductor device, comprising:
 providing a substrate;   forming a first active region on the substrate;   forming a second active region on the substrate;   forming a third active region on the substrate, wherein   the first active region includes a first portion and a second portion, and the second active region includes a first portion and a second portion;   the first portion of the first active region includes a first width in a first orientation and the second portion of the first active region includes a second width in the first orientation;   the first portion of the second active region includes a third width in the first orientation and the second portion of the second active region includes a fourth width in the first orientation;   the first width, the second width, the third width, and the fourth width are different; and   the third active region includes a fourth stair profile and a fifth stair profile, wherein distances between a rising edge of the fourth stair profile and adjacent gate structures are substantially the same.   
     
     
         12 . The method of  claim 11 , wherein the first portion of the first active region and the second portion of the first active region collectively specify a first stair profile, and wherein the first stair profile is located between two adjacent gate structures, wherein a distance between the rising edge of the fourth stair profile and a rising edge of the fifth stair profile is equal to that between two adjacent gate structures. 
     
     
         13 . The method of  claim 12 , wherein the first portion of the first active region and the second portion of the first active region collectively specify a second stair profile, wherein the second stair profile is located between two adjacent gate structures, and wherein the first stair profile and the second stair profile are located on different sides of the first active region. 
     
     
         14 . The method of  claim 11 , wherein the first portion of the second active region and the second portion of the second active region collectively specify a third stair profile, and wherein the third stair profile is located between two adjacent gate structures. 
     
     
         15 . The method of  claim 12 , wherein the first stair profile includes a rising edge located in the middle of the two adjacent gate structures. 
     
     
         16 . The method of  claim 13 , wherein the second stair profile includes a rising edge located in the middle of the two adjacent gate structures. 
     
     
         17 . The method of  claim 11 , wherein a first distance between the first portion of the first active region and the first portion of the second active region is greater than a distance, and a second distance between the second portion of the first active region and the second portion of the second active region is greater than the distance. 
     
     
         18 . The method of  claim 13 , wherein a length of a rising edge of the first stair profile is less than a length of a rising edge of the second stair profile. 
     
     
         19 . A method of manufacturing a semiconductor device, comprising:
 providing a substrate;   forming a first active region on the substrate;   forming a first gate structure and a second gate structure on the first active region, wherein   the first active region includes a first portion and a second portion of different longitudinal widths from a top view, and   the first portion of the first active region and the second portion of the first active region collectively specify a first stair profile between the first gate structure and the second gate structure.   
     
     
         20 . The method of  claim 19 , further comprising:
 forming a second active region on the substrate, wherein   the second active region includes a first portion and a second portion of different longitudinal widths from a top view, and   the first portion of the second active region and the second portion of the second active region collectively specify a second stair profile between the first gate structure and the second gate structure.

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