Superconducting quantum architectures

Abstract

Presented herein are techniques through which modular architectures and systems may be implemented for superconducting (SC) quantum processing elements or chips utilizing photonic interconnects. In one instance, an SC processing element is provided that includes a plurality of interconnected qubits, wherein a first qubit of the plurality of interconnected qubits is interconnected with a first microwave-optical transducer. In one instance, a system is provided that includes a first SC processing element comprising a first plurality of interconnected qubits, wherein a first microwave-optical transducer is interconnected with a first qubit of the first plurality of interconnected qubits; a second SC processing element comprising a second plurality of interconnected qubits, wherein a second microwave-optical transducer is interconnected with a first qubit of the second plurality of interconnected qubits; and an optical network interconnecting the first microwave-optical transducer and the second microwave-optical transducer.

What is claimed is: 
     
         1 . A quantum processing chip, comprising:
 a plurality of interconnected qubits, wherein a first qubit of the plurality of interconnected qubits is interconnected with a first on-chip microwave-optical transducer configured for the quantum processing chip and wherein a second qubit of the plurality of interconnected qubits is interconnected with a second on-chip microwave-optical transducer and the first on-chip microwave-optical transducer is interconnected with the second on-chip microwave-optical transducer.   
     
     
         2 . The quantum processing chip of  claim 1 , wherein the first qubit is an interior qubit of the quantum processing chip or an exterior qubit of the quantum processing chip. 
     
     
         3 . The quantum processing chip of  claim 1 , wherein the first on-chip microwave-optical transducer is interconnected with the second on-chip microwave-optical transducer via an optical fiber. 
     
     
         4 . The quantum processing chip of  claim 3 , wherein the first qubit and the second qubit are nonadjacent. 
     
     
         5 . The quantum processing chip of  claim 3 , wherein the first qubit is an exterior qubit of the quantum processing chip and the second qubit is an exterior qubit of the quantum processing chip. 
     
     
         6 . The quantum processing chip of  claim 3 , wherein the first qubit is an interior qubit of the quantum processing chip and the second qubit is an exterior qubit of the quantum processing chip. 
     
     
         7 . The quantum processing chip of  claim 3 , wherein the first qubit is an interior qubit of the quantum processing chip and the second qubit is an interior qubit of the quantum processing chip. 
     
     
         8 . The quantum processing chip of  claim 1 , the plurality of interconnected qubits are arranged in a two-dimensional array. 
     
     
         9 . The quantum processing chip of  claim 1 , further comprising:
 a first photonic waveguide interconnected with the first on-chip microwave-optical transducer;   a second photonic waveguide interconnected with the second on-chip microwave-optical transducer; and   at least one on-chip optical network interconnected with the first photonic waveguide and the second photonic waveguide.   
     
     
         10 . The quantum processing chip of  claim 1 , wherein the first on-chip microwave-optical transducer is interconnected with the second on-chip microwave-optical transducer via an optical network. 
     
     
         11 . The quantum processing chip of  claim 10 , wherein the first on-chip microwave-optical transducer is interconnected with the optical network via a first optical fiber and the second on-chip microwave-optical transducer is interconnected with the optical network via a second optical fiber. 
     
     
         12 . A system comprising:
 a first quantum processing chip comprising a first plurality of interconnected qubits, wherein a first on-chip microwave-optical transducer is interconnected with a first qubit of the first plurality of interconnected qubits;   a second quantum processing chip comprising a second plurality of interconnected qubits, wherein a second on-chip microwave-optical transducer is interconnected with a first qubit of the second plurality of interconnected qubits; and   an optical network, wherein a first optical fiber interconnects the first on-chip microwave-optical transducer with the optical network and a second optical fiber interconnects the second on-chip microwave-optical transducer with the optical network.   
     
     
         13 . The system of  claim 12 , wherein the first qubit of the first plurality of interconnected qubits is an exterior qubit of the first quantum processing chip and the first qubit of the second plurality of interconnected qubits is an exterior qubit of the second quantum processing chip. 
     
     
         14 . The system of  claim 12 , wherein the first qubit of the first plurality of interconnected qubits is an exterior qubit of the first quantum processing chip and the first qubit of the second plurality of interconnected qubits is an interior qubit of the second quantum processing chip. 
     
     
         15 . The system of  claim 12 , wherein the first qubit of the first plurality of interconnected qubits is an interior qubit of the first quantum processing chip and the first qubit of the second plurality of interconnected qubits is an interior qubit of the second quantum processing chip. 
     
     
         16 . The system of  claim 12 , wherein the first quantum processing chip and the second quantum processing chip are operated in a cooling unit and the optical network is operated external to the cooling unit. 
     
     
         17 . The system of  claim 12 , wherein the first quantum processing chip is operated in a first cooling unit, the second quantum processing chip is operated in a second cooling unit, and the optical network is operated external to the first cooling unit and the second cooling unit. 
     
     
         18 . The system of  claim 12 , wherein the first plurality of interconnected qubits of the first quantum processing chip are arranged in a two-dimensional array. 
     
     
         19 . The system of  claim 12 , wherein the second plurality of interconnected qubits of the second quantum processing chip are arranged in a two-dimensional array. 
     
     
         20 . The system of  claim 12 , wherein the first plurality of interconnected qubits of the first quantum processing chip are arranged in a two-dimensional array and the second plurality of interconnected qubits of the second quantum processing chip are arranged in a two-dimensional array.