Host logical-to-physical information refresh

Abstract

Devices and techniques are disclosed herein for providing L2P information to a host device from a storage system, the L2P information comprising a response information unit having a limited size with separate categories of information including changed L2P region and associated subregion information, to-be-loaded L2P region and associated subregion information, and invalid L2P region and associated subregion information, wherein the information in the separate categories is based on the determined changes in the different L2P regions and the subregion information in each of the separate categories identifies specific locations of changed subregions with respect to one or more corresponding regions identified in the region information of a respective category of the response information unit.

What is claimed is: 
     
         1 . A system comprising:
 a storage system comprising a memory controller and a memory array, the storage system configured to maintain a relationship between a logical block address (LBA) and a physical address (PA) of data stored by the memory array in a logical-to-physical (L2P) map, and to provide L2P information to a host device, wherein each region of the L2P map corresponds to a respective logical address range;   wherein the memory controller is configured to receive a memory request from the host device and, in response, provide a response message comprising information about:
 a changed L2P region identifying regions previously provided to the host device that are no longer valid but remain available to the storage system without loading from the memory array; 
 a to-be-loaded L2P region identifying regions ready for loading by the host device but not yet transferred to the host device; and 
 an invalid L2P region identifying regions that are no longer valid and require loading from the memory array. 
   
     
     
         2 . The system of  claim 1 , wherein a size of subregions within the logical address ranges is 4K bytes, and wherein each logical address range comprises multiple subregions. 
     
     
         3 . The system of  claim 1 , wherein the host device is configured to request L2P information from the storage system using an L2P read buffer command. 
     
     
         4 . The system of  claim 3 , wherein the L2P read buffer command comprises an operation code, a buffer ID, an L2P region, an L2P subregion, and an allocation length. 
     
     
         5 . The system of  claim 1 , wherein the memory controller is configured to determine L2P state changes in different L2P regions and subregions of the memory array based on changes in the L2P map at the storage system, wherein the L2P states of L2P regions and subregions include valid, changed, to-be-loaded, and invalid states. 
     
     
         6 . The system of  claim 5 , wherein the memory controller is configured to record L2P state changes in a temporary data structure comprising a change list, and wherein L2P information transitions from a valid state to a changed state when affected by host writes or internal relocation of data, and transitions to a to-be-loaded state when encrypted for transfer to the host device. 
     
     
         7 . The system of  claim 1 , wherein the response message comprises sequential fields, each field allocated a predetermined number of bytes and comprising (1) a first single-byte portion storing a region index and (2) a second single-byte portion storing a most significant bit and (3) a third single-byte portion storing a least significant bit. 
     
     
         8 . The system of  claim 7 , wherein the sequential fields include:
 (1) a first field comprising changed L2P region and subregion information identifying regions previously provided to the host device that are no longer valid but remain available to the storage system without loading from the memory array;   (2) a second field comprising to-be-loaded L2P region and subregion information identifying regions ready for host device loading but not yet transferred to the host device; and   (3) a third field comprising invalid L2P region and subregion information identifying regions that are no longer valid and require loading from the memory array.   
     
     
         9 . The system of  claim 8 , wherein a size of one or more of the changed L2P subregion, the to-be-loaded L2P subregion, or the invalid L2P subregion on the memory array is 4K bytes, and wherein one or more of the changed L2P region, the to-be-loaded L2P region, or the invalid L2P region comprises multiple subregions. 
     
     
         10 . The system of  claim 8 , wherein the changed L2P region information, the to-be-loaded L2P region information, and the invalid L2P region information in the response message are each 1 byte in size, and wherein the changed L2P subregion information, the to-be-loaded L2P subregion information, or the invalid L2P subregion information in the response message are each 2 bytes in size, including one byte for a most significant bit (MSB) and one byte for a least significant bit (LSB). 
     
     
         11 . The system of  claim 1 , wherein the memory controller is configured to notify the host device that L2P information should be updated using an L2P update needed flag, and wherein the response message is provided when the L2P update needed flag indicates that L2P information at the host device requires updating. 
     
     
         12 . The system of  claim 1 , wherein the memory controller is configured to set an L2P update needed flag when a predetermined threshold of L2P misses is reached or when an L2P information hit ratio falls below an acceptable threshold, and wherein the response message comprising the changed, to-be-loaded, and invalid L2P region information is triggered by the L2P update needed flag. 
     
     
         13 . A system comprising:
 a storage system comprising a memory controller and a memory array, the storage system configured to maintain a relationship between a logical block address (LBA) and a physical address (PA) of data stored on the memory array in a logical-to-physical (L2P) map, and to provide L2P information to a host device, wherein each region of the L2P map corresponds to a respective logical address range;   wherein the memory controller is configured to:
 determine L2P state changes in different L2P regions and subregions of the memory array based on changes in the L2P map at the storage system, wherein the L2P states of L2P regions and subregions include valid, changed, to-be-loaded, and invalid states; 
 notify the host device that L2P information should be updated using an L2P update needed flag; and 
 provide, as a response to a host memory request, a response message having a limited size and comprising:
 changed L2P region and associated subregion information identifying regions previously provided to the host device that are no longer valid but remain available to the storage system without loading from the memory array; 
 to-be-loaded L2P region and associated subregion information identifying regions ready for host device loading but not yet transferred to the host device; and 
 invalid L2P region and associated subregion information identifying regions that are no longer valid and require loading from the memory array. 
 
   
     
     
         14 . The system of  claim 13 , wherein a size of subregions within the logical address ranges is 4K bytes, and wherein the changed L2P region information, the to-be-loaded L2P region information, and the invalid L2P region information are each 1 byte in size. 
     
     
         15 . The system of  claim 14 , wherein the changed L2P subregion information, the to-be-loaded L2P subregion information, and the invalid L2P subregion information are each 2 bytes in size. 
     
     
         16 . The system of  claim 13 , wherein the changed L2P region information, the to-be-loaded L2P region information, and the invalid L2P region information are each 1 byte in size, and wherein associated subregion information comprises 2 bytes including one byte for a most significant bit and one byte for a least significant bit. 
     
     
         17 . The system of  claim 13 , wherein the host device is configured to request L2P information from the storage system using an L2P read buffer command comprising an operation code, a buffer ID, an L2P region, an L2P subregion, and an allocation length. 
     
     
         18 . The system of  claim 13 , wherein the memory controller is configured to record L2P state changes in a temporary data structure comprising a change list, and wherein L2P information transitions from a valid state to a changed state when affected by host writes or internal relocation of data. 
     
     
         19 . The system of  claim 13 , wherein the memory controller is configured to provide L2P map data in a command descriptor block (CDB) format when a requested L2P region or subregion is valid, and to terminate an L2P read buffer command and send a response with a check condition status when a requested L2P region or subregion is invalid. 
     
     
         20 . At least one non-transitory device-readable storage medium comprising instructions that, when executed by a memory controller of a memory system, cause the memory controller to perform operations comprising:
 maintaining a relationship between a logical block address (LBA) and a physical address (PA) of data stored on a memory array of the storage system in a logical-to-physical (L2P) map, and providing L2P information to a host device, wherein each region of the L2P map corresponds to a respective logical address range;   determining L2P state changes in different L2P regions and subregions of the memory array based on changes in the L2P map at the storage system, wherein the L2P states of L2P regions and subregions include valid, changed, to-be-loaded, and invalid states;   notifying the host device that L2P information should be updated using an L2P update needed flag; and   providing, as a response to a host memory request, a response message comprising:
 first L2P region and associated subregion information identifying regions previously provided to the host device that are no longer valid but remain available to the storage system without loading from the memory array; 
 second L2P region and associated subregion information identifying regions ready for host device loading but not yet transferred to the host device; and 
   third L2P region and associated subregion information identifying regions that are no longer valid and require loading from the memory array.