Memory systems, methods of operating the same, and storage mediums

Abstract

Examples of the present application provide memory systems, methods of operating thereof, and storage mediums. An example memory system includes at least one memory device and a memory controller; the memory controller is coupled with both a host and the memory device and includes a write buffer and a control section coupled with the write buffer; the control section is configured to: in response to upcoming execution of an erase event of a block in the memory device, configure a portion of an idle storage space of the memory controller as a newly-added storage space of the write buffer; write data received from the host to the newly-added storage space of the write buffer in response to execution of the erase event; and release the newly-added storage space of the write buffer in response to completion of the erase event.

What is claimed is: 
     
         1 . A memory system, comprising:
 at least one memory device; and   a memory controller coupled with both a host and the memory device, including:
 a write buffer; and 
 a control section coupled with the write buffer and configured to:
 in response to upcoming execution of an erase event of a block in the memory device, configure a portion of an idle storage space of the memory controller as a newly-added storage space of the write buffer; 
 write data received from the host to the newly-added storage space of the write buffer in response to execution of the erase event; and 
 release the newly-added storage space of the write buffer in response to completion of the erase event. 
 
   
     
     
         2 . The memory system of  claim 1 , wherein the control section is configured to cause all newly-added storage spaces allocated to the write buffer in response to erase events of different blocks to have the same size. 
     
     
         3 . The memory system of  claim 2 , wherein a size of the newly-added storage space allocated to the write buffer is positively correlated with an average duration of the erase event of the block. 
     
     
         4 . The memory system of  claim 1 , wherein the control section is configured to write data stored in the write buffer to the memory device in response to an amount of data stored in an original storage space of the write buffer being greater than or equal to a preset threshold. 
     
     
         5 . The memory system of  claim 4 , wherein the control section is configured to, in response to the memory device requiring opening of a new block for data writing, control the memory device to perform an erase operation on the new block before writing data to the new block, wherein a start of the erase operation is execution of the erase event, and an end of the erase operation is completion of the erase event. 
     
     
         6 . The memory system of  claim 5 , wherein the control section is configured to, in response to the amount of the data stored in the original storage space of the write buffer being greater than or equal to the preset threshold and the memory device requiring the opening of the new block for data writing:
 determine the upcoming execution of the erase event of the memory device;   generate an erase command; and   send the erase command to the memory device.   
     
     
         7 . The memory system of  claim 1 , wherein the control section is configured to:
 in response to the completion of the erase event, write the data in an original storage space of the write buffer and the data in the newly-added storage space of the write buffer sequentially to the memory device in a chronological order of writing to the original storage space of the write buffer and to the newly-added storage space of the write buffer; and   release the newly-added storage space of the write buffer in response to completion of writing the data in the newly-added storage space of the write buffer to the memory device.   
     
     
         8 . The memory system of  claim 1 , wherein an original storage space of the write buffer is smaller than a preset storage space. 
     
     
         9 . The memory system of  claim 1 , wherein the memory controller further includes a volatile memory device, and a portion of a storage space of the volatile memory device is used as an original storage space of the write buffer and the newly-added storage space of the write buffer. 
     
     
         10 . The memory system of  claim 9 , wherein the memory device includes a NAND, and the volatile memory device includes an SRAM/DRAM. 
     
     
         11 . The memory system of  claim 1 , including an enterprise solid state drive (eSSD). 
     
     
         12 . A method of operating a memory system, comprising:
 in response to upcoming execution of an erase event of a block in a memory device coupled with a memory controller of the memory system, configuring, by a control section of the memory controller, a portion of an idle storage space of the memory controller as a newly-added storage space of a write buffer of the memory controller coupled with the control section;   writing data received from a host coupled with the memory controller to the newly-added storage space of the write buffer in response to execution of the erase event; and   releasing the newly-added storage space of the write buffer in response to completion of the erase event.   
     
     
         13 . The method of  claim 12 , wherein the portion of the idle storage space of the memory controller is allocated to the write buffer, and the method includes causing all newly-added storage spaces allocated to the write buffer in response to erase events of different blocks to have the same size. 
     
     
         14 . The method of  claim 12 , including writing data stored in the write buffer to the memory device in response to an amount of data stored in an original storage space of the write buffer being greater than or equal to a preset threshold. 
     
     
         15 . The method of  claim 14 , including, in response to the memory device requiring opening of a new block for data writing, controlling the memory device to perform an erase operation on the new block before writing data to the new block, wherein a start of the erase operation is execution of the erase event, and an end of the erase operation is completion of the erase event. 
     
     
         16 . The method of  claim 15 , including, in response to the amount of the data stored in the original storage space of the write buffer being greater than or equal to the preset threshold and the memory device requiring the opening of the new block for data writing:
 determining the upcoming execution of the erase event of the memory device;   generating an erase command; and   sending the erase command to the memory device.   
     
     
         17 . The method of  claim 12 , wherein the newly-added storage space of the write buffer is released, and the method includes:
 in response to the completion of the erase event, writing the data in an original storage space of the write buffer and the data in the newly-added storage space of the write buffer sequentially to the memory device in an order of writing; and   releasing the newly-added storage space of the write buffer in response to completion of writing the data in the newly-added storage space of the write buffer to the memory device.   
     
     
         18 . The method of  claim 12 , wherein the memory device includes a NAND. 
     
     
         19 . The method of  claim 12 , wherein the memory system includes an enterprise solid state drive (eSSD). 
     
     
         20 . A storage medium, storing executable instructions that, when executed, implement operations of a method of operating a memory system, the method comprising:
 in response to upcoming execution of an erase event of a block in a memory device coupled with a memory controller of the memory system, configuring, by a control section of the memory controller, a portion of an idle storage space of the memory controller as a newly-added storage space of a write buffer of the memory controller coupled with the control section;   writing data received from a host coupled with the memory controller to the newly-added storage space of the write buffer in response to execution of the erase event; and   releasing the newly-added storage space of the write buffer in response to completion of the erase event.