Multilayered capacitor
Abstract
Disclosed is a multilayered capacitor that includes a capacitor body including a dielectric layer and an internal electrode, and an external electrode outside the capacitor body, wherein the external electrode includes a first layer connected to the internal electrode, a second layer covering a portion of the first layer and exposing another portion, a third layer covering the second layer and including a resin and a conductive metal, and a fourth layer covering the first and third layers, and an area ratio of the resin included in the second layer is greater than an area ratio of the resin included in the third layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A multilayered capacitor,
a capacitor body including a dielectric layer and an internal electrode, and an external electrode disposed on outside surface the capacitor body, wherein the external electrode includes a first layer disposed on the capacitor body and connected to the internal electrode, a second layer disposed on a portion of the first layer and exposing a remaining portion of the first layer, and including a first resin and a first conductive metal, a third layer disposed on the second layer and including a second resin and a second conductive metal, and a fourth layer disposed on the first and third layers, the capacitor body has first and second surfaces facing each other in a stacking direction of the dielectric layer and the internal electrodes, third and fourth surfaces facing each other in a longitudinal direction, and fifth and sixth surfaces facing each other in a width direction, in a cross-section cut in the longitudinal and thickness directions perpendicular to a width direction at a center in the width direction, an area ratio of the first resin included in the second layer is greater than an area ratio of the second resin included in the third layer.
2 . The multilayered capacitor of claim 1 , wherein
the second layer is not disposed on the second surface, and the third layer is not disposed on the second surface.
3 . The multilayered capacitor of claim 1 , wherein
the first layer is disposed on the first, second, and third surfaces, the second layer is disposed on the first and third surfaces or the first and fourth surfaces, the third layer is disposed on the first and third surfaces or the first and fourth surfaces, and the fourth layer is disposed on the first, second, and third surfaces.
4 . The multilayered capacitor of claim 3 , wherein
the first to fourth layers are disposed on the fifth and sixth surfaces.
5 . The multilayered capacitor of claim 3 , wherein
in a cross section cut in the longitudinal direction and the stacking direction perpendicular to the width direction at the center of the width direction of the multilayered capacitor, on the third or fourth surface, a length of the second layer in the stacking direction is less than or equal to a length of the first layer in the stacking direction, and on the third or fourth surface, a length of the third layer in the stacking direction on the third or fourth surface is less than or equal to a length of the first layer in the stacking direction.
6 . The multilayered capacitor of claim 3 , wherein
in a cross section cut in the longitudinal direction and the stacking direction perpendicular to the width direction at the center of the width direction of the multilayered capacitor, on the third or fourth surface, a length of the second layer in the stacking direction is about 95% or less relative to a length of the first layer in the stacking direction, and on the third or fourth surface, a length of the third layer in the stacking direction is about 95% or less relative to a length of the first layer in the stacking direction.
7 . The multilayered capacitor of claim 1 , wherein
in a cross section cut in the longitudinal direction and the stacking direction perpendicular to the width direction at the center of the width direction of the multilayered capacitor, on the third or fourth surface, a length of the third layer in the stacking direction is greater than or equal to a length of the second layer in the stacking direction.
8 . The multilayered capacitor of claim 1 , wherein
on the first surface, the second layer is disposed to completely cover the first layer, and on the first surface, the third layer is disposed to completely cover the first layer.
9 . The multilayered capacitor of claim 1 , wherein
on the first surface, the third layer is disposed to completely cover the second layer.
10 . The multilayered capacitor of claim 1 , wherein the on the first surface, the third layer is disposed to partially expose the second layer without covering it completely.
11 . The multilayered capacitor of claim 1 , wherein
on the first surface, the second layer is disposed to completely cover the first layer, on the first surface, the third layer is disposed to partially expose the second layer without covering it completely, and on the first surface, the fourth layer is disposed to partially expose the second layer without covering it completely.
12 . The multilayered capacitor of claim 1 , wherein
the second layer further includes a non-conductive filler.
13 . The multilayered capacitor of claim 12 , wherein
the non-conductive filler includes silica, glass-based oxide, or a combination thereof.
14 . The multilayered capacitor of claim 1 , wherein
in a cross section cut in the longitudinal direction and the stacking direction perpendicular to the width direction at the center of the width direction of the multilayered capacitor, an area ratio of the resin included in the second layer is about 60% to about 100% with respect to a total area of the second layer, and an area ratio of the resin included in the third layer is about 8% to about 60% with respect to a total area of the third layer.
15 . The multilayered capacitor of claim 1 , wherein
in a cross section cut in the longitudinal direction and the stacking direction perpendicular to the width direction at the center of the width direction of the multilayered capacitor, an area ratio of the first conductive metal included in the second layer is smaller than an area ratio of the first resin included in the second layer, and an area ratio of the second conductive metal included in the third layer is greater than an area ratio of the second resin included in the third layer.
16 . The multilayered capacitor of claim 1 , wherein
in a cross section cut in the longitudinal direction and the stacking direction perpendicular to the width direction at the center of the width direction of the multilayered capacitor, on the third or fourth surface, a maximum length of the second layer in the longitudinal direction is greater than or equal to about 3 μm.Join the waitlist — get patent alerts
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