US2025284951A1PendingUtilityA1
Neural network system, floating point number processing method and device
Est. expiryMar 5, 2044(~17.6 yrs left)· nominal 20-yr term from priority
G06F 7/483G06N 3/08G06N 3/045G06N 3/0464G06N 3/084G06N 3/063
58
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Claims
Abstract
The application discloses a neural network system, a method, and a device for processing floating-point number. A self-defined floating-point number is obtained, wherein the self-defined floating-point number comprises a sign field, an exponent field, and a mantissa field, and a value of the self-defined floating-point number is determined by bit of the sign field, bits of the exponent field, bits of the mantissa field, and a bias value, wherein the bias value is determined by a total bit number of the exponent field. The self-defined floating-point number is applied to numerical calculations.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A neural network system comprising one or more memory devices, wherein the one or more memory devices store one or more neural network models, and when training the one or more neural network models, the one or more memory devices executing:
initiating weight training iterations; determining whether an abnormal weight is detected; when the abnormal weight is detected, setting the abnormal weight to a reference value; and when no abnormal weights are detected, proceeding to the next training iteration.
2 . The neural network system of claim 1 , wherein, when determining whether the abnormal weight is detected, checking whether at least one of an updated weight and a pre-update weight is abnormal.
3 . The neural network system of claim 1 , wherein, when a weight exceeds a range of a median of normal weights plus or minus one or more standard deviations, the weight is determined to be abnormal.
4 . The neural network system of claim 1 , wherein, when a weight exceeds a value range, the weight is determined to be abnormal, and the value range depends on a self-defined floating-point format.
5 . The neural network system of claim 1 , wherein, the reference value is a median of a plurality of normal weights.
6 . The neural network system of claim 1 , wherein, the reference value is zero.
7 . A floating-point processing method applied to an electronic device, the floating-point processing method comprising:
obtaining a self-defined floating-point number, wherein the self-defined floating-point number comprises a sign field, an exponent field, and a mantissa field, and a value of the self-defined floating-point number is determined by bit of the sign field, bits of the exponent field, bits of the mantissa field, and a bias value, wherein the bias value is determined by a total bit number of the exponent field; and applying the self-defined floating-point number to numerical calculations.
8 . The floating-point processing method of claim 7 , wherein
the exponent field includes X exponent bits, the mantissa field includes Y mantissa bits, X and Y are positive integers; when an exponent field value E and a mantissa field value M are both 0, the value of the self-defined floating-point number is positive-negative zero; when the exponent field value E is 0 and the mantissa field value M is greater than 0, the value of the self-defined floating-point number is:
(
-
1
)
s
×
2
-
(
b
+
1
)
×
M
2
Y
,
where b is the bias value, and s represents a sign bit of the sign field;
when 0<E<2 X −1, the value of the self-defined floating-point number is
(
-
1
)
s
×
2
E
-
b
×
(
1
+
M
2
Y
)
,
and the value of the self-defined floating-point number is a normal value;
when E=2 X −1 and M=0, the value of the self-defined floating-point number is positive-negative infinity; and
when E=2 X −1 and M>0, the value of the self-defined floating-point number is not a number (NaN).
9 . The floating-point processing method of claim 8 , wherein relationship between the bias value and the total bit number of the exponent field is: b=2 X −1.
10 . The floating-point processing method of claim 8 , wherein relationship between the bias value and the total bit number of the exponent field is:
b
∈
[
Round
(
2
3
2
X
-
1
)
,
2
X
-
1
]
,
where Round is a rounding function.
11 . The floating-point processing method of claim 8 , wherein, as the bias value increases, a value range of the self-defined floating-point number decreases.
12 . A floating-point processing device comprising a processor, the processor executing:
obtaining a self-defined floating-point number, wherein the self-defined floating-point number comprises a sign field, an exponent field, and a mantissa field, and a value of the self-defined floating-point number is determined by bit of the sign field, bits of the exponent field, bits of the mantissa field, and a bias value, wherein the bias value is determined by a total bit number of the exponent field; and applying the self-defined floating-point number to numerical calculations.
13 . The floating-point processing device of claim 12 , wherein
the exponent field includes X exponent bits, the mantissa field includes Y mantissa bits, X and Y are positive integers; when an exponent field value E and a mantissa field value M are both 0, the value of the self-defined floating-point number is positive-negative zero; when the exponent field value E is 0 and the mantissa field value M is greater than 0, the value of the self-defined floating-point number is:
(
-
1
)
s
×
2
-
(
b
+
1
)
×
M
2
Y
,
where b is the bias value, and s represents a sign bit of the sign field;
when 0<E<2 X −1, the value of the self-defined floating-point number is
(
-
1
)
s
×
2
E
-
b
×
(
1
+
M
2
Y
)
,
and the value of the self-defined floating-point number is a normal value;
when E=2 X −1 and M=0, the value of the self-defined floating-point number is positive-negative infinity; and
when E=2 X −1 and M>0, the value of the self-defined floating-point number is not a number (NaN).
14 . The floating-point processing device of claim 13 , wherein relationship between the bias value and the total bit number of the exponent field is: b=2 X −1.
15 . The floating-point processing device of claim 13 , wherein relationship between the bias value and the total bit number of the exponent field is:
b
∈
[
Round
(
2
3
2
X
-
1
)
,
2
X
-
1
]
,
where Round is a rounding function.
16 . The floating-point processing device of claim 13 , wherein, as the bias value increases, a value range of the self-defined floating-point number decreases.Join the waitlist — get patent alerts
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