Floating Point Adder

Abstract

An adder and a method for calculating 2 n +x are provided, where x is a variable input expressed in a floating point format and n is an integer. The adder comprises a first path configured to calculate 2 n +x for x<0 and 2 n−1 ≤|x|<2 n+1 ; a second path configured to calculate 2 n +x for |x|<2 n ; a third path configured to calculate 2 n +x for |x|≥2 n ; and selection logic configured to cause the adder to output a result from one of the first, second, and third paths in dependence on the values of x and n.

What is claimed is: 
     
         1 . A method of calculating 2 n −x using an adder implemented in hardware, where x is a variable input expressed in a floating point format and n is an integer, wherein the adder comprises:
 a first path configured to calculate 2 n +y for y<0 and 2 n−1 ≤|y|<2 n+1 , where y is a variable; 
 a second path configured to calculate 2 n +y for |y|<2 n ; and 
 a third path configured to calculate 2 n +y for |y|≥2 n ; 
 
       the method comprising:
 receiving data representing the input, x; 
 changing the sign of x to determine data representing y, wherein y=−x; 
 providing at least some of the data representing y to one or more of the first, second, and third paths for calculating 2 n +y; 
 selecting one of the first, second, and third paths in dependence on the values of y and n; and 
 outputting a result calculated by the selected path. 
 
     
     
         2 . The method according to  claim 1 , wherein the step of selecting one of the first, second, and third paths comprises:
 if y<0 and 2 n−1 ≤|y|<2 n+1 , selecting the first path, thereby causing the adder to output a result from the first path; and   if the first path is not selected, selecting the second or third path based on a comparison of |y| and 2 n .   
     
     
         3 . The method according to  claim 2 , wherein the step of selecting one of the first, second, and third paths comprises:
 if the first path is not selected and |y|<2 n , selecting the second path, thereby causing the adder to output a result from the second path; and   if the first and second paths are not selected, selecting the third path, thereby causing the adder to output a result from the third path.   
     
     
         4 . The method according to  claim 2 , wherein the step of selecting one of the first, second, and third paths comprises:
 if the first path is not selected and |y|≥2 n , selecting the third path, thereby causing the adder to output a result from the third path; and   if the first and third paths are not selected, selecting the second path, thereby causing the adder to output a result from the second path.   
     
     
         5 . The method according to  claim 2 , wherein the step of selecting one of the first, second, and third paths comprises performing the comparison of |y| and 2 n  to determine whether |y|<2 n  or |y|≥2 n  by comparing the exponent of y with n. 
     
     
         6 . The method of  claim 1 , wherein the first path comprises a negation unit configured to, if |y|<2 n , negate the mantissa of y, and output the negated mantissa of y, wherein the negation unit is configured to, if |y|≥2 n , output the mantissa y; and
 wherein the first path does not comprise a shifter configured to shift the bits of y or 2 n  prior to the operation of the negation unit. 
 
     
     
         7 . The method according to  claim 6 , wherein the first path comprises a renormaliser configured to shift the output of the negation unit to remove leading zeros and the second and third paths do not comprise a renormaliser. 
     
     
         8 . The method according to  claim 6 , wherein the second path comprises a negation unit configured to, if y<0, negate the mantissa of y, wherein the negation unit of the first path and the negation unit of the second path are the same unit. 
     
     
         9 . The method according to  claim 1 , wherein the second and third paths each comprise a rounding unit configured to round the result of the respective path in accordance with a predefined rounding mode and the first path does not comprise a rounding unit configured to round the result of the first path. 
     
     
         10 . The method according to  claim 1 , wherein the step of selecting one of the first, second, and third paths comprises using one or more multiplexers configured to receive a result from each of the paths, and to output the result from one of the paths in dependence on the values of y and n. 
     
     
         11 . The method according to  claim 1 , wherein the first and third paths comprise integer addition logic configured to perform signed binary addition and the second path does not comprise integer addition logic configured to perform signed binary addition. 
     
     
         12 . The method according to  claim 1 , wherein the third path is configured to add or subtract 2 n  to or from the significand of y in dependence of whether y is positive or negative. 
     
     
         13 . The method according to  claim 1 , wherein the third path is configured to, if y<0, subtract 2 n  from the mantissa of y and change the sign of the result. 
     
     
         14 . A method of calculating x−2 n  using an adder implemented in hardware, where x is a variable input expressed in a floating point format and n is an integer, wherein the adder comprises:
 a first path configured to calculate 2 n +y for y<0 and 2 n−1 ≤|y|<2 n+1 , where y is a variable; 
 a second path configured to calculate 2 n +y for |y|<2 n ; and 
 a third path configured to calculate 2 n +y for |y|≥2 n ; 
 
       the method comprising:
 receiving data representing the input, x; 
 changing the sign of x to determine data representing y, wherein y=−x; 
 providing at least some of the data representing y to one or more of the first, second, and third paths for calculating 2 n +y; 
 selecting one of the first, second, and third paths in dependence on the values of y and n; 
 changing the sign of a result calculated by the selected path to determine an output; and 
 outputting the determined output. 
 
     
     
         15 . The method according to  claim 14 , wherein the step of selecting one of the first, second, and third paths comprises:
 if y<0 and 2 n−1 ≤|y|<2 n+1 , selecting the first path, thereby causing the adder to output a result from the first path; and   if the first path is not selected, selecting the second or third path based on a comparison of |y| and 2 n .   
     
     
         16 . The method according to  claim 15 , wherein the step of selecting one of the first, second, and third paths comprises:
 if the first path is not selected and |y|<2 n , selecting the second path, thereby causing the adder to output a result from the second path; and   if the first and second paths are not selected, selecting the third path, thereby causing the adder to output a result from the third path.   
     
     
         17 . The method according to  claim 15 , wherein the step of selecting one of the first, second, and third paths comprises:
 if the first path is not selected and |y|≥2 n , selecting the third path, thereby causing the adder to output a result from the third path; and   if the first and third paths are not selected, selecting the second path, thereby causing the adder to output a result from the second path.   
     
     
         18 . The method according to  claim 14 , wherein the first path comprises a negation unit configured to, if |y|<2 n , negate the mantissa of y, and output the negated mantissa of y, wherein the negation unit is configured to, if |y|≥2 n , output the mantissa y;
 wherein the first path does not comprise a shifter configured to shift the bits of y or 2 n  prior to the operation of the negation unit; 
 wherein the first path comprises a renormaliser configured to shift the output of the negation unit to remove leading zeros and the second and third paths do not comprise a renormaliser; and 
 wherein the second path comprises a negation unit configured to, if y<0, negate the mantissa of y, wherein the negation unit of the first path and the negation unit of the second path are the same unit. 
 
     
     
         19 . The method according to  claim 14 , wherein the second and third paths each comprise a rounding unit configured to round the result of the respective path in accordance with a predefined rounding mode and the first path does not comprise a rounding unit configured to round the result of the first path. 
     
     
         20 . The method according to  claim 14 , wherein the step of selecting one of the first, second, and third paths comprises using one or more multiplexers configured to receive a result from each of the paths, and to output the result from one of the paths in dependence on the values of y and n.