US2025258346A1PendingUtilityA1

Hybrid optic waveguide input/output (io) and electric io integration for high performance chips

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Assignee: QUALCOMM INCPriority: Feb 8, 2024Filed: Feb 8, 2024Published: Aug 14, 2025
Est. expiryFeb 8, 2044(~17.5 yrs left)· nominal 20-yr term from priority
Inventors:Xia Li
G02B 6/4214G02B 2006/12061G02B 6/305G02B 6/34G02B 6/12004G02B 6/43G02B 6/42G02B 6/4206
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Claims

Abstract

A chip is described, including a substrate having an active device in the substrate. The chip also includes a first optical waveguide on the substrate. The chip further includes a second optical waveguide on the first optical waveguide and extending from the first optical waveguide though back-end-of-line (BEOL) layers of the chip. The chip also includes a waveguide photo detector (PD) on the first optical waveguide and communicably coupled to the active device through the BEOL layers of the chip.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A chip, comprising:
 a substrate including an active device in the substrate;   a first optical waveguide on the substrate;   a second optical waveguide on the first optical waveguide and extending from the first optical waveguide though back-end-of-line (BEOL) layers of the chip; and   a waveguide photo detector (PD) on the first optical waveguide and communicably coupled to the active device through the BEOL layers of the chip.   
     
     
         2 . The chip of  claim 1 , in which the active device is coupled to the waveguide PD through the BEOL layers to integrate an electric signal path of the active device with the first optical waveguide and the second optical waveguide. 
     
     
         3 . The chip of  claim 1 , in which the second optical waveguide is in an active device layer of the substrate and the waveguide PD is directly on the first optical waveguide. 
     
     
         4 . The chip of  claim 3 , in which the active device layer comprises a silicon-on-insulator (SOI) layer. 
     
     
         5 . The chip of  claim 1 , in which the waveguide PD comprises a multiple quantum well (MQW) PD. 
     
     
         6 . The chip of  claim 1 , further comprising an airgap communicably coupled between the first optical waveguide and the second optical waveguide. 
     
     
         7 . The chip of  claim 1 , further comprising a metal communicably coupled between the first optical waveguide and the second optical waveguide. 
     
     
         8 . The chip of  claim 1 , further comprising a fiber optic cable coupled to the second optical waveguide. 
     
     
         9 . The chip of  claim 1 , further comprising a grating coupler between the first optical waveguide and the second optical waveguide. 
     
     
         10 . The chip of  claim 1 , in which the first optical waveguide and the second optical waveguide are composed of a same material. 
     
     
         11 . The chip of  claim 10 , in which the same material comprises silicon nitride (SiN). 
     
     
         12 . A method of fabricating a chip, comprising:
 forming an active device in a substrate;   forming a first optical waveguide on the substrate;   forming a second optical waveguide on the first optical waveguide, in which the second optical waveguide extends from the first optical waveguide though back-end-of-line (BEOL) layers of the chip; and   forming a waveguide photo detector (PD) on the first optical waveguide and communicably coupled to the active device through the BEOL layers of the chip.   
     
     
         13 . The method of  claim 12 , in which the active device is coupled to the waveguide PD through the BEOL layers to integrate an electric signal path of the active device with the first optical waveguide and the second optical waveguide. 
     
     
         14 . The method of  claim 12 , in which the second optical waveguide is in an active device layer of the substrate and the waveguide PD is directly on the first optical waveguide. 
     
     
         15 . The method of  claim 14 , in which the active device layer comprises a silicon-on-insulator (SOI) layer. 
     
     
         16 . The method of  claim 12 , in which the waveguide PD comprises a multiple quantum well (MQW) PD. 
     
     
         17 . The method of  claim 12 , further comprising forming an airgap communicably coupled between the first optical waveguide and the second optical waveguide. 
     
     
         18 . The method of  claim 12 , further comprising forming a metal communicably coupled between the first optical waveguide and the second optical waveguide. 
     
     
         19 . The method of  claim 12 , further comprising a fiber optic cable coupled to the second optical waveguide. 
     
     
         20 . The method of  claim 12 , further comprising a grating coupler between the first optical waveguide and the second optical waveguide.

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