Mram device having two-terminal selectors

Abstract

A memory device includes a spin-orbit torque (“SOT”) conductor, a magnetic tunneling junction (“MTJ”) structure above the SOT conductor, a two-terminal read selector above the MTJ structure, a two-terminal write selector above the MTJ structure, and a bit line below the SOT conductor. The two-terminal read selector is conductively connected to the pinned layer in the MTJ structure. The two-terminal write selector is conductively connected to a first terminal of the SOT conductor. The bit line is conductively connected to a second terminal of the SOT conductor.

What is claimed is: 
     
         1 . A memory device comprising:
 a spin-orbit torque (“SOT”) conductor;   a magnetic tunneling junction (“MTJ”) structure arranged above the SOT conductor, wherein the MTJ structure has a free layer, a pinned layer, and a tunnel barrier layer sandwiched between the free layer and the pinned layer, and wherein the free layer is in conductive contact with the SOT conductor;   a two-terminal read selector conductively connected to the pinned layer in the MTJ structure, wherein the two-terminal read selector is arranged above the MTJ structure;   a two-terminal write selector conductively connected to a first terminal of the SOT conductor, wherein the two-terminal write selector is arranged above the MTJ structure; and   a bit line conductively connected to a second terminal of the SOT conductor, wherein the bit line is arranged below the SOT conductor.   
     
     
         2 . The memory device of  claim 1 , further comprising:
 a read word line conductively connected to the two-terminal read selector, wherein the read word line is arranged above the two-terminal read selector.   
     
     
         3 . The memory device of  claim 1 , further comprising:
 a write word line conductively connected to the two-terminal write selector, wherein the write word line is arranged above the two-terminal write selector.   
     
     
         4 . The memory device of  claim 1 , further comprising:
 a read word line conductively connected to the two-terminal read selector; and   a write word line conductively connected to the two-terminal write selector.   
     
     
         5 . The memory device of  claim 4 , wherein the read word line and the write word line are in a same conductive layer above the two-terminal write selector. 
     
     
         6 . The memory device of  claim 4 , wherein each of the SOT conductor and the bit line extends in a first direction, and wherein the write word line and the read word line extend in a second direction that is perpendicular to the first direction. 
     
     
         7 . The memory device of  claim 1 , wherein each of the two-terminal read selector and the two-terminal write selector is a non-linear diode. 
     
     
         8 . The memory device of  claim 1 , wherein each of the two-terminal read selector and the two-terminal write selector includes a switching layer sandwiched between a first conductor layer and a second conductor layer. 
     
     
         9 . The memory device of  claim 8 , wherein the switching layer in the two-terminal read selector and the switching layer in the two-terminal write selector are formed from a same layer of switching material. 
     
     
         10 . The memory device of  claim 8 , wherein at least the switching layer in the two-terminal write selector includes a phase-change material. 
     
     
         11 . The memory device of  claim 8 , wherein at least the switching layer in the two-terminal write selector includes a chalcogenide material or a solid-electrolyte material. 
     
     
         12 . A memory device comprising:
 a spin-orbit torque (“SOT”) conductor;   a magnetic tunneling junction (“MTJ”) structure arranged above the SOT conductor, wherein the MTJ structure has a free layer, a pinned layer, and a tunnel barrier layer sandwiched between the free layer and the pinned layer, and wherein the free layer is in conductive contact with the SOT conductor;   a two-terminal read selector conductively connected to the pinned layer in the MTJ structure, wherein the two-terminal read selector is arranged above the MTJ structure;   a two-terminal write selector conductively connected to a first terminal of the SOT conductor, wherein the two-terminal write selector is arranged below the MTJ structure;   a write word line conductively connected to the two-terminal write selector, wherein the write word line is arranged below the two-terminal write selector; and   a bit line conductively connected to a second terminal of the SOT conductor, wherein the bit line is arranged below the write word line.   
     
     
         13 . The memory device of  claim 12 , further comprising:
 a read word line conductively connected to the two-terminal read selector, wherein the read word line is arranged above the two-terminal read selector.   
     
     
         14 . The memory device of  claim 13 , wherein the SOT conductor extends in a first direction, and wherein the write word line and the read word line extend in a second direction that is perpendicular to the first direction. 
     
     
         15 . The memory device of  claim 14 , wherein the bit line extends in the first direction and is vertically stacked with the SOT conductor. 
     
     
         16 . A method comprising:
 forming a spin-orbit torque (“SOT”) conductor extending in a first direction;   forming a magnetic tunneling junction (“MTJ”) structure over the SOT conductor, wherein forming the MTJ structure comprises depositing a free layer over the SOT conductor, depositing a tunnel barrier layer over the free layer, and depositing a pinned layer over the tunnel barrier layer; and   forming a two-terminal read selector above the MTJ structure, wherein the two-terminal read selector is conductively connected to the pinned layer in the MTJ structure; and   forming a two-terminal write selector which is conductively connected to a first terminal of the SOT conductor.   
     
     
         17 . The method of  claim 16 , further comprising:
 forming a read word line extending in a second direction above the two-terminal read selector, wherein the second direction is perpendicular to the first direction.   
     
     
         18 . The method of  claim 16 , further comprising:
 forming the two-terminal write selector above the MTJ structure; and   forming a write word line extending in a second direction above the two-terminal write selector.   
     
     
         19 . The method of  claim 16 , wherein forming the SOT conductor comprise forming the SOT conductor above the two-terminal write selector, and wherein the two-terminal write selector is formed after forming a write word line extending in a second direction. 
     
     
         20 . The method of  claim 16 , further comprising:
 forming a bit line extending in the first direction; and   forming the SOT conductor above the bit line and having a second terminal conductively connected to the bit line, wherein the SOT conductor is vertically stacked with the bit line.