US2025204158A1PendingUtilityA1

Display device and method of manufacturing display device

Assignee: SAMSUNG DISPLAY CO LTDPriority: Dec 19, 2023Filed: Jun 17, 2024Published: Jun 19, 2025
Est. expiryDec 19, 2043(~17.4 yrs left)· nominal 20-yr term from priority
H10K 50/115H10K 59/131H10K 59/87H10K 71/00H10K 59/1201H10K 59/122H10K 71/16H10K 71/621H10K 71/20H10K 71/60H10K 59/873H10K 59/1213H10K 59/8052H10K 59/80522H10K 59/1315H10K 50/824H10K 50/844
57
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Claims

Abstract

A display device and a method of manufacturing the display device. The display device may include a sub-pixel area, a pixel circuit layer may include a line electrically connected to the pixel circuit. At least a portion of a capping layer is in contact with the pixel defining layer. The line is disposed on a pixel defining layer and includes a first line and a second line spaced apart from each other, each forming a closed loop. The first line surrounds the sub-pixel area in a plan view, the second line surrounds the first line in a plan view. A light emitting part is disposed in an area surrounded by the first line.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A display device including a sub-pixel area, comprising:
 a pixel circuit layer including a base layer and a pixel circuit disposed on the base layer; and   a light emitting element layer disposed on the pixel circuit layer and including a light emitting element, a pixel defining layer, a capping layer, and a line electrically connected to the pixel circuit, wherein   the light emitting element includes an anode electrode, a cathode electrode, and a light emitting part,   at least a portion of the light emitting part being disposed between the anode electrode and the cathode electrode,   the pixel defining layer covers at least a portion of the anode electrode,   at least a portion of the capping layer is in contact with the pixel defining layer,   the line is disposed on the pixel defining layer and includes a first line and a second line spaced apart from each other,   each of the first line and the second line is disposed in a closed loop,   the first line surrounds the sub-pixel area in a plan view, the second line surrounds the first line in a plan view, and   the light emitting part is disposed in an area surrounded by the first line.   
     
     
         2 . The display device according to  claim 1 , wherein the line includes a conductive material having an electrical conductivity less than about 4.0×10 7  (S/m) at about 20° C. 
     
     
         3 . The display device according to  claim 2 , wherein the line includes aluminum (Al) or molybdenum (Mo). 
     
     
         4 . The display device according to  claim 1 , wherein
 the first line and the second line include a same material, and   each of the first line and the second line is disposed on a surface of the pixel defining layer.   
     
     
         5 . The display device according to  claim 1 , wherein
 the first line is disposed around the sub-pixel area,   the second line is disposed around the first line,   the sub-pixel area includes a first sub-pixel area, a second sub-pixel area, and a third sub-pixel area, and   the first line includes a first line portion surrounding the first sub-pixel area, a second line portion surrounding the second sub-pixel area, and a third line portion surrounding the third sub-pixel area.   
     
     
         6 . The display device according to  claim 5 , wherein
 the cathode electrode includes a first cathode electrode overlapping the first sub-pixel area, a second cathode electrode overlapping the second sub-pixel area, and a third cathode electrode overlapping the third sub-pixel area, and   the first cathode electrode, the second cathode electrode, and the third cathode electrode are physically separated from each other.   
     
     
         7 . The display device according to  claim 1 , wherein
 the pixel circuit layer includes a first power line and a second power line having different potentials,   the first power line is electrically connected to the pixel circuit, and   the second power line is electrically connected to the cathode electrode through the first line.   
     
     
         8 . The display device according to  claim 7 , further comprising:
 a display area and a non-display area surrounding at least a portion of the display area, wherein   the first line is electrically connected to the second power line through a contact portion at least partially passing through the pixel defining layer,   the second power line has a thickness greater than that of the cathode electrode, and   the contact portion is disposed in the display area.   
     
     
         9 . The display device according to  claim 1 , wherein
 the capping layer includes a first capping layer and a second capping layer disposed on the first capping layer,   the first capping layer covers the first line and does not cover the second line, and   the second capping layer covers the second line.   
     
     
         10 . The display device according to  claim 9 , wherein
 each of the second capping layer and the pixel defining layer includes an inorganic material and   the second capping layer and the pixel defining layer contact each other in an area adjacent to the second line.   
     
     
         11 . A display device comprising:
 a display area and a non-display area surrounding at least a portion of the display area;   a pixel circuit layer including a base layer, a pixel circuit, a power line disposed on the base layer, and a via layer covering the power line; and   a light emitting element layer disposed on the pixel circuit layer and including a light emitting element, a pixel defining layer, and a line electrically connected to the pixel circuit, wherein   the light emitting element includes an anode electrode, a cathode electrode, and a light emitting part,   at least a portion of the light emitting part is disposed between the anode electrode and the cathode electrode,   the pixel defining layer overlaps the anode electrode in a plan view,   the line is directly disposed on the pixel defining layer and includes a first line and a second line spaced apart from each other,   the power line is disposed across the display area and the non-display area,   the cathode electrode and the power line are electrically connected in the display area through a contact member passing through the via layer, and   the power line has a thickness greater than that of the cathode electrode.   
     
     
         12 . A method of manufacturing a display device, the method comprising:
 manufacturing a pixel circuit layer; and   manufacturing a light emitting element layer disposed on the pixel circuit layer, the light emitting layer including a light emitting element, wherein   manufacturing the light emitting element layer comprises:
 forming an anode electrode, a pixel defining layer, and lines on the pixel circuit layer; and 
 forming a sub-pixel by patterning a plurality of layers near the lines, 
   the lines are disposed on the pixel defining layer and include a first line and a second line spaced apart from each other, and the first line is disposed closer to the anode electrode than the second line, and   the patterning of the plurality of layers near the lines comprises:
 forming a base light emitting part; 
 removing at least a portion of the base light emitting part adjacent to the first line by supplying a first voltage to the first line; 
 forming a base cathode electrode and a first base capping layer; and 
 removing at least a portion of the base cathode electrode, at least a portion of the first base capping layer, and at least a portion of the base light emitting part adjacent to the second line by supplying a second voltage to the second line. 
   
     
     
         13 . The method according to  claim 12 , wherein
 the pixel circuit layer includes:
 a pixel circuit, 
 a first power line electrically connected to the pixel circuit, and 
 a second power line having a potential different from that of the first power line, and 
   the forming of the lines comprises electrically connecting the first line to the second power line.   
     
     
         14 . The method according to  claim 13 , wherein the forming of the base light emitting part comprises entirely depositing the base light emitting part on the pixel circuit layer. 
     
     
         15 . The method according to  claim 12 , wherein the removing of the at least a portion of the base light emitting part adjacent to the first line comprises providing a first light emitting part disposed in an area surrounded by the first line. 
     
     
         16 . The method according to  claim 12 , wherein the forming of the base cathode electrode comprises:
 electrically connecting the base cathode electrode to the first line; and   causing the base cathode electrode to contact the pixel defining layer in an area adjacent to the first line.   
     
     
         17 . The method according to  claim 12 , wherein
 the removing of the at least a portion of the base light emitting part adjacent to the first line comprises forming a first opening exposing at least a portion of the pixel defining layer, and   the removing of the at least a portion of the base cathode electrode, the at least a portion of the first base capping layer, and the at least a portion of the base light emitting part adjacent to the second line comprises forming a second opening exposing at least a portion of the pixel defining layer.   
     
     
         18 . The method according to  claim 12 , further comprising:
 forming second base capping layer; and   removing at least a portion of the first base capping layer, at least a portion of the base cathode electrode, and at least a portion of the base light emitting part disposed outside the second line.   
     
     
         19 . The method according to  claim 18 , wherein
 the second base capping layer contacts the pixel defining layer in an area adjacent to the second line, and   each of the second base capping layer and the pixel defining layer includes an inorganic material.   
     
     
         20 . The method according to  claim 12 , further comprising:
 entirely depositing an encapsulation layer on the pixel circuit layer.

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