Tantalum electrode with tantalum nitride liner as rie diffusion barrier

Abstract

A semiconductor device and method of manufacture prevents the diffusion of halogen gases from reactive ion etching to prevent the formation of hillocks. The semiconductor device includes a substrate, and a metal layer in contact with the substrate. An electrode made of tantalum is arranged on top of the metal layer, and a diffusion barrier layer is arranged between the top electrode and the metal layer. The diffusion barrier layer is formed of a halogen-blocking material.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a substrate;   a metal layer in contact with the substrate;   an electrode comprising tantalum (Ta) arranged on top of the metal layer;   a diffusion barrier layer arranged between the electrode and the metal layer, wherein the diffusion barrier layer comprises a halogen-blocking material.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the diffusion barrier layer comprises tantalum nitride (TaN). 
     
     
         3 . The semiconductor device according to  claim 2 , wherein the diffusion barrier layer has a height in a range of substantially 8 to 10 nm. 
     
     
         4 . The semiconductor device according to  claim 2 , wherein the diffusion barrier layer has a height in a range of 8 to 20 nm. 
     
     
         5 . The semiconductor device according to  claim 4 , further comprising an etch stop layer arranged between the diffusion barrier layer and the metal layer, the etch stop layer extending over an upper portion of the substrate. 
     
     
         6 . The semiconductor device according to  claim 5 , wherein the etch stop layer comprises ruthenium (Ru), and further comprising a magnetic tunnel junction stack formed between the metal layer and the etch stop layer. 
     
     
         7 . The semiconductor device according to  claim 1 , wherein the metal layer comprises copper (Cu). 
     
     
         8 . The semiconductor device according to  claim 1 , wherein the substrate comprises a patterned substrate. 
     
     
         9 . The semiconductor device according to  claim 1 , wherein the substrate comprises silicon (Si) or silicon nitride (SiN). 
     
     
         10 . A method of manufacturing a semiconductor device, the method comprising:
 arranging a metal layer on a substrate;   arranging a diffusion barrier layer constructed of a halogen-blocking material on the metal layer; and   arranging an electrode constructed of tantalum (Ta) on top of the diffusion barrier layer; and   performing reactive ion etching (RIE) to trim a width of the Ta electrode to form a pillar.   
     
     
         11 . The method according to  claim 10 , wherein the arranging of the diffusion barrier layer further comprises providing a TaN diffusion barrier layer having a height in a range of 8 to 20 nm. 
     
     
         12 . The method according to  claim 10 , wherein arranging of the diffusion barrier layer further comprises providing a tantalum nitride (TaN) diffusion barrier layer having a height in a range of about 8 to 10 nm. 
     
     
         13 . The method according to  claim 12 , further comprising providing an etch stop layer arranged between the diffusion barrier layer and the metal layer, the etch stop layer extending over an upper portion of the substrate. 
     
     
         14 . The method according to  claim 13 , further comprising providing a silicon oxide (SiOx) layer on top of the Ta electrode. 
     
     
         15 . The method according to  claim 14 , further comprising providing an organic planarization layer (OPL) on an upper surface of the SiOx layer. 
     
     
         16 . The method according to  claim 15 , further comprising providing an anti-reflective coating layer on an upper surface of the OPL. 
     
     
         17 . The method according to  claim 16 , further comprising providing a photoresist (PR) layer on a portion of an upper surface of the anti-reflective coating layer. 
     
     
         18 . A semiconductor device comprising:
 a metal layer;   a magnetic tunnel junction stack arranged on the metal layer;   an electrode comprising tantalum (Ta) arranged on top of the metal layer;   a diffusion barrier layer arranged between the electrode and the metal layer, wherein the diffusion barrier layer comprises a halogen gas-blocking material, wherein a thickness of the diffusion barrier layer is 8 to 10 nm.   
     
     
         19 . The semiconductor device according to  claim 18 , further comprising an etch stop layer arranged between the diffusion barrier layer and the metal layer, and wherein the electrode and the diffusion barrier layer are etched into a pillar shape by reactive ion etching (RIE). 
     
     
         20 . The semiconductor device according to  claim 18 , wherein the diffusion barrier layer blocks fluorine (F), chlorine (CI), and bromine (Br) gases from passing to the metal layer.